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ES29LV640D-90RWCI 参数 Datasheet PDF下载

ES29LV640D-90RWCI图片预览
型号: ES29LV640D-90RWCI
PDF下载: 下载PDF文件 查看货源
内容描述: 为4Mbit ( 512Kx 8 / 256K ×16 )的CMOS 3.0伏只,引导扇区闪存 [4Mbit(512Kx 8/256K x 16) CMOS 3.0 Volt-only, Boot Sector Flash Memory]
分类和应用: 闪存
文件页数/大小: 51 页 / 679 K
品牌: EXCELSEMI [ EXCEL SEMICONDUCTOR INC. ]
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Excel Semiconductor inc.  
WRITE OPERATION STATUS  
Erase algorithm is complete, or if the device enters  
the Erase Suspend mode, Data# polling produces a  
“1” on DQ7. The system must provide an address  
within any of the sectors selected for erasure to read  
valid status information on DQ7.  
In the ES29LV400 device, several bits are provided  
to determine the status of a program or erase oper-  
ation: DQ2, DQ3, DQ5, DQ6, DQ7 and RY/BY#.  
Table 6 and the following subsections describe the  
function of these bits. DQ7 and DQ6 each offer a  
method for determining whether a program or erase  
operation is complete or in progress. The device  
also provides a hardware-based output signal, RY/  
BY#, to determine whether an Embedded Program  
or Erase operation is in progress or has been com-  
pleted.  
Erase on the Protected Sectors  
After an erase command sequence is written, if all  
sectors selected for erasing are protected, Data#  
Polling on DQ7 is active for approximately 1.8us,  
then the device returns to the read mode. If not all  
selected sectors are protected, the Embedded Erase  
algorithm erases the unprotected sectors, and  
ignores the selected sectors that are protected. How-  
ever, if the system reads DQ7 at an address within a  
protected sector, the status may not be valid.  
DQ7 (DATA# POLLING)  
The Data# Polling bit, DQ7, indicates to the host  
system whether an Embedded Program or Erase  
algorithm is in progress or completed, or whether a  
device is in Erase Suspend. Data# Polling is valid  
after the rising edge of the final WE# pulse in the  
command sequence.  
Data# Polling Algorithm  
Just prior to the completion of an Embedded  
Program or Ease operation, DQ7 may change  
asynchronously with DQ0-DQ6 while Output  
Enable(OE#) is asserted low. That is, this device  
may change from providing status information to  
valid data on DQ7. Depending on when the system  
samples the DQ7 output, it may read the status or  
valid data. Even if the device has completed the  
program or erase operation and DQ7 has valid data,  
the data outputs on DQ0-DQ7 will appear on  
successive read cycles.  
During Programming  
During the Embedded Program algorithm, the  
device outputs on DQ7 the complement of the  
datum programmed to DQ7. This DQ7 status also  
applies to programming during Erase Suspend.  
When the Embedded Program algorithm is com-  
plete, the device outputs the datum programmed to  
DQ7. The system must provide the program  
address to read valid status information on DQ7. If  
a program address falls within a protected sector,  
Data# Polling on DQ7 is active for approximately  
250ns, then the device returns to the read mode.  
Table 6 shows the outputs for Data# Polling on DQ7.  
Fig. 9 shows the Data# Polling algorithm. Fig. 22 in  
the AC Characteristics section shows the Data#  
Polling timing diagram.  
During Erase  
During the Embedded Erase algorithm, Data# Poll-  
ing produces a “0” on DQ7. When the Embedded  
21  
Rev.0B January 5, 2006  
ES29LV400E  
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