E S I
E S I
Excel Semiconductor inc.
AC CHARACTERISTICS
Table 16. Erase and Program Operations
Parameter
Description
70
90
Unit
JEDEC
tAVAV
Std.
tWC
Write Cycle Time (Note 1)
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
70
90
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tAVWL
tAS
Address Setup Time
0
tASO
tAH
tAHT
tDS
Address Setup Time to OE# low during toggle bit polling
Address Hold Time
15
45
tWLAX
45
35
Address Hold Time From CE# or OE# high during toggle bit polling
Data Setup Time
0
tDVWH
tWHDX
45
tDH
Data Hold Time
0
tOEPH
tGHWL
tCS
Output Enable High during toggle bit polling
Read Recovery Time Before Write (OE# High to WE# Low)
CE# Setup Time
20
0
tGHWL
tELWL
0
tWHEH
tWLWH
tWHDL
tCH
CE# Hold Time
0
tWP
Write Pulse Width
35
35
tWPH
tSR/W
Write Pulse Width High
30
0
Latency Between Read and Write Operations
Byte
Typ
Typ
Typ
6
8
tWHWH1
tWHWH2
tWHWH1
Programming Operation (Note 2)
Word
us
tWHWH2
tVCS
Sector Erase Operation (Note 2)
Vcc Setup Time (Note 1)
0.7
sec
us
Min
Min
Max
50
0
tRB
Write Recovery Time from RY/BY#
Program/Erase Valid to RY/BY# Delay
ns
tBUSY
90
ns
Notes:
1. Not 100% tested.
2. See the “Erase And Programming Performance” section for more information.
36
Rev. 0B January 5 , 2006
ES29LV160E
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