XRT86L30
SINGLE T1/E1/J1 FRAMER/LIU COMBO
REV. 1.0.1
T
ABLE 81: TRANSMIT
S
IGNALING
C
ONTROL
R
EGISTER X - T1 MODE
DDRESS: 0X0340 TO 0X035F
R
EGISTER 124-155 - T1
T
RANSMIT
S
IGNALING
C
ONTROL
R
EGISTER X (TSCR) (0-23)
H
EX
A
B
IT
F
UNCTION
TYPE
D
EFAULT
DESCRIPTION-OPERATION
7
A (x)
R/W
0 (1)
Signaling bit A
A,B,C,D: These are programmable signaling information.
6
5
4
3
2
B (y)
C (x)
D (x)
R/W
R/W
R/W
-
0 (0)
0 (1)
0 (1)
-
Signaling bit B
Signaling bit C
Signaling bit D
Reserved
Reserved
Rob_Enb
R/W
0
Robbed-bit signaling enable
This bit enables Robbed-bit signaling transmission.
0 = Robbed-bit is disabled.
1 = Robbed-bit is enabled
1
0
TxSIGSRC[1]
TxSIGSRC[0]
R/W
R/W
0
0
Channel signaling control
These bits determine the selection of signaling conditioning.
00 = No signaling data is inserted into input PCM data.
01 = Signaling data is inserted from TSCRs.
10 = Signaling data is inserted from TxSig input.
11 = No signaling.
TABLE 82: RECEIVE
C
HANNEL
C
ONTROL
R
EGISTER X (RCCR 0-31) - E1 MODE
R
EGISTER 156-187 E1
R
ECEIVE
C
HANNEL ONTROL
C
R
EGISTER X (RCCR 0-31) HEX ADDRESS: 0X0360 TO 0X037F
B
IT
FUNCTION
TYPE
D
EFAULT
DESCRIPTION-OPERATION
7-6 LAPDcntl
R/W
10
LAPD Control
These bits select which LAPD controller is to be activated.
00 = LAPD1
01 = LAPD2
10 = RxDE[1:0] will determine the data source for the D/E Time
Slots
11 = LAPD3
5-4 Reserved
-
-
Reserved
83
EXAR [ EXAR CORPORATION ]
