XRT86L30
SINGLE T1/E1/J1 FRAMER/LIU COMBO
REV. 1.0.1
FIGURE 116. FRAMER
SYSTEM RECEIVE TIMING DIAGRAM (RXSERCLK AS AN INPUT)
t18
t19
t20
RxCRCSYNC
RxCASYNC
RxSYNC
RxSERCLK
(Input)
t21
RxSER
t22
RxCHN[4:0]
AC ELECTRICAL CHARACTERISTICS TRANSMIT OVERHEAD FRAMER
Test Conditions: TA = 25°C, VDD = 3.3V + 5% unless otherwise specified
S
YMBOL
P
ARAMETER
M
IN
.
TYP
.
MAX
.
U
NITS
CONDITIONS
t23
TxSYNC Setup Time (Falling Edge TxSERCLK)
TxSYNC Hold Time (Falling Edge TxSERCLK)
Rising Edge of TxSERCLK to TxOHCLK
5
nS
nS
nS
t24
t25
1
11
FIGURE 117. FRAMER
SYSTEM TRANSMIT OVERHEAD TIMING DIAGRAM
t23
t24
TxSYNC
TxSERCLK
TxOHCLK
t25
265
EXAR [ EXAR CORPORATION ]
