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ST16C580CP40 参数 Datasheet PDF下载

ST16C580CP40图片预览
型号: ST16C580CP40
PDF下载: 下载PDF文件 查看货源
内容描述: UART具有16字节FIFO的和红外( IrDA)的编码/解码器 [UART WITH 16-BYTE FIFO’s AND INFRARED (IrDA) ENCODER/DECODER]
分类和应用: 解码器先进先出芯片编码器
文件页数/大小: 41 页 / 244 K
品牌: EXAR [ EXAR CORPORATION ]
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ST16C580  
LCRBIT-7:  
LCR BIT-4:  
The internal baud rate counter latch and Enhance  
Feature mode enable.  
Logic 0 = Divisor latch disabled. (normal default  
condition)  
Logic 1 = Divisor latch and enhanced feature register  
enabled.  
If the parity bit is enabled with LCR bit-3 set to a logic  
1, LCR BIT-4 selects the even or odd parity format.  
Logic 0 = ODD Parity is generated by forcing an odd  
number of logic 1’s in the transmitted data. The  
receiver must be programmed to check the same  
format. (normal default condition)  
Modem Control Register (MCR)  
Logic 1 = EVEN Parity is generated by forcing an even  
the number of logic 1’s in the transmitted. The receiver  
must be programmed to check the same format.  
This register controls the interface with the modem or  
a peripheral device.  
LCR BIT-5:  
MCR BIT-0:  
If the parity bit is enabled, LCR BIT-5 selects the  
forced parity format.  
LCR BIT-5 = logic 0, parity is not forced (normal  
default condition)  
Logic 0 = Force -DTR output to a logic 1. (normal  
default condition)  
Logic 1 = Force -DTR output to a logic 0.  
LCR BIT-5 = logic 1 and LCR BIT-4 = logic 0, parity bit  
is forced to a logical 1 for the transmit and receive  
data.  
LCR BIT-5 = logic 1 and LCR BIT-4 = logic 1, parity bit  
is forced to a logical 0 for the transmit and receive  
data.  
MCR BIT-1:  
Logic 0 = Force -RTS output to a logic 1. (normal  
default condition)  
Logic 1 = Force -RTS output to a logic 0.  
Automatic RTS may be used for hardware flow control  
by enabling EFR bit-6 (See EFR bit-6).  
LCR  
LCR  
LCR  
Parity selection  
MCR BIT-2:  
Bit-5 Bit-4 Bit-3  
Logic 0 = Set -OP1 output to a logic 1. (normal default  
condition)  
X
0
0
1
1
X
0
1
0
1
0
1
1
1
1
No parity  
Odd parity  
Even parity  
Force parity “1”  
Forced parity “0”  
Logic 1 = Set -OP1 output to a logic 0.  
MCR BIT-3:  
Logic 0 = Set -OP2 output to a logic 1. (normal default  
condition)  
Logic 1 = Set -OP2 output to a logic 0.  
LCR BIT-6:  
MCR BIT-4:  
When enabled the Break control bit causes a break  
condition to be transmitted (the TX output is forced to  
a logic 0 state). This condition exists until disabled by  
setting LCR bit-6 to a logic 0.  
Logic 0 = Disable loop-back mode. (normal default  
condition)  
Logic 1 = Enable local loop-back mode (diagnostics).  
MCR BIT-5:  
Not used.  
Logic 0 = No TX break condition. (normal default  
condition)  
Logic 1 = Forces the transmitter output (TX) to a logic  
0 for alerting the remote receiver to a line break  
condition.  
MCR BIT-6:  
Logic 0 = Enable Modem receive and transmit input/  
output interface. (normal default condition)  
Logic 1 = Enable infrared IrDA receive and transmit  
Rev.1.20  
22  
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