MP8798
ELECTRICAL CHARACTERISTICS TABLE (CONT’D)
Parameter
DIGITAL OUTPUTS
Logical “1” Voltage
Logical “0” Voltage
Tristate Leakage
Data Hold Time (See
NO TAG)
1
Data Valid Delay
1
Write Pulse Width
1
Multiplexer Address Setup Time
1
Multiplexer Address Hold Time
1
Delay from WR to Multiplexer
1
Enable
Power Down Time
1
Power Up Time
1
POWER SUPPLIES
8
Power Down (I
DD
)
Operating Voltage (AV
DD
, DV
DD
)
Current (AV
DD
+ DV
DD
)
I
PD-DD
V
DD
I
DD
0.6
5
6
1.2
6.5
10
mA
V
mA
V
OH
V
OL
I
OZ
t
HLD
t
DL
t
WR
t
AS
t
AH
t
MUXEN1
t
PD
t
PU
DV
DD
-0.5
0
30
35
40
80
0
80
300
200
0.4
5
35
45
V
V
µA
ns
ns
ns
ns
ns
ns
ns
ns
Symbol
Min
25
°
C
Typ
Max
Units
Test Conditions/Comments
C
OUT
=15 pF
I
LOAD
= 2 mA
I
LOAD
= 4 mA
V
OUT
= 0 to DV
DD
4
V
IN
= 2 V
NOTES:
Guaranteed. Not tested.
Tester measures code transition voltages by dithering the voltage of the analog input (V
IN
). The difference between the measured
code width and the ideal value (V
REF
/1024) is the DNL error (see
NO TAG).
The INL error is the maximum distance (in LSBs) from
the best fit line to any transition voltage (See
Figure 7.).
3
See V
IN
input equivalent circuit (see
Figure 9.).
4
Clock specification to meet aperture specification (t
AP
). Actual rise/fall time can be less stringent with no loss of accuracy.
5
Specified values guarantee functional device. Refer to other parameters for accuracy.
6
System can clock MP8798 with any duty cycle as long as all timing conditions are met.
7
Input range where input is converted correctly into binary code. Input voltage outside specified range converts to zero or full scale
output.
8
DV
DD
and AV
DD
are connected through the silicon substrate. Connect together at the package.
1
2
Specifications are subject to change without notice
ABSOLUTE MAXIMUM RATINGS (T
A
= +25
°
C unless otherwise noted)
1, 2
V
DD
(to GND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7 V
V
REF(+)
& V
REF(–)
. . . . . . . . . . . . . . GND –0.5 to V
DD
+0.5 V
V
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . GND –0.5 to V
DD
+0.5 V
All Inputs . . . . . . . . . . . . . . . . . . . . . GND –0.5 to V
DD
+0.5 V
All Outputs . . . . . . . . . . . . . . . . . . . GND –0.5 to V
DD
+0.5 V
Storage Temperature . . . . . . . . . . . . . . . . . . . –65 to +150
°
C
Lead Temperature (Soldering 10 seconds) . . . . . . . +300
°
C
Package Power Dissipation Rating to 75
°
C
SOIC, PDIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000mW
Derates above 75
°
C . . . . . . . . . . . . . . . . . . . . . 14mW/
°
C
NOTES:
1
Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a
stress rating only and functional operation at or above this specification is not implied. Exposure to maximum rating
conditions for extended periods may affect device reliability.
2
Any input pin which can see a value outside the absolute maximum ratings should be protected by Schottky diode clamps
(HP5082-2835) from input pin to the supplies.
All inputs have protection diodes
which will protect the device from short
transients outside the supplies of less than 100mA for less than 100
µ
s.
3
V
DD
refers to AV
DD
and DV
DD
. GND refers to AGND and DGND.
Rev. 3.00
5
EXAR [ EXAR CORPORATION ]
