MP7652
Inputs
PRESET
0
1
1
1
1
1
1
1
1
1
Internal
Address
LD
X
1
0
0→1
0
0→1
0
0→1
0
0→1
Output
SDO
X
Last bit
of shift reg.
Hi-Z
Last bit
of shift reg.
Hi-Z
Last bit
of shift reg.
Hi-Z
Last bit
of shift reg.
Hi-Z
Last bit
of shift reg.
SDI
X
Data In
X
X
X
X
X
X
X
X
CLK
X
0→1
X
X
X
X
X
X
X
X
A1
X
X
0
0
0
0
1
1
1
1
A0
X
X
0
0
1
1
0
0
1
1
Operation
Preset all DACs to
1/2 (V
REFP
+ V
REFN
)
Shift data in and out
DAC 1 Transparent
DAC 1 Latched
DAC 2 Transparent
DAC 2 Latched
DAC 3 Transparent
DAC 3 Latched
DAC 4 Transparent
DAC 4 Latched
Table 1. Digital Function Truth Table
Serial In/Serial Out
D7
MSB
0
0
D6
D5
D4
D3
D2
D1
D0 DAC Output Voltage
D
LSB V
OUTi
= V
REFNi
+ (V
REFPi –
V
REFNi
) (
256
)
0
1
V
REFN
1
(V
REFP
– V
REFN
) ( 256 ) + V
REFN
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
254
(V
REFP
– V
REFN
) ( 256 ) + V
REFN
255
(V
REFP
– V
REFN
) ( 256 ) + V
REFN
Table 2. DAC Transfer Function
Analog Output vs. Digital Code
Rev. 1.00
8