MP7652
OPERATION WITH DUAL POSITIVE POWER SUPPLIES
For the dual positive supplies operation, VCC = +10 V, VDD = 5 V, VEE = 0 V and analog output zero level is to be referenced to (VCC
EE) /2 by setting the AGND pin to 5 V.
+
V
MICROPROCESSOR INTERFACE
ADDRESS BUS
A0 to A23
AS
ADDRESS
DECODER
CS
VMA
MC68000
CLK LD
UPA
UDS
SDI
MP7652
PRESET
1/4 7HC125
16
DB0
16
FROM SYSTEM RESET
DATA BUS
DB0 to DB15
Figure 5. MC68000 Interface (Simplified Diagram)
ADDRESS BUS
16
1
A0 to A15
3
A0 to A2
E1
E3
E2
MC6800
74LS138
02
ADDRESS
DECODER
R/W
8
8
DB0 to DB7
DATA BUS
LD
CLK
DB7
MP7652
SDI
PRESET
FROM SYSTEM RESET
NOTES:
1. Execute consecutive memory write instructions while manipulating the data between WRITEs so that
each WRITE presents the next bit
2. The serial data loading is triggered by the CLK pulse which is asserted by a decoded memory WRITE
location2000, R/W, and 02. A WRITE to address 4000 transfers data from the input shift register to the
DAC register.
Figure 6. MC6800 Interface (Simplified Diagram)
Rev. 1.00
9