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MP7641AN 参数 Datasheet PDF下载

MP7641AN图片预览
型号: MP7641AN
PDF下载: 下载PDF文件 查看货源
内容描述: 8通道电压输出10 MHz的输入带宽8位乘法DAC,串行数字端口 [8-Channel Voltage Output 10 MHz Input Bandwidth 8-Bit Multiplying DACs with Serial Digital Port]
分类和应用: 转换器光电二极管信息通信管理
文件页数/大小: 24 页 / 250 K
品牌: EXAR [ EXAR CORPORATION ]
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MP7641  
THEORY OF OPERATION  
The MP7641 is equipped with a serial data 3-wire standard  
µ-processor logic interface to reduce pin count, package size,  
andboardwire(space). ThisinterfaceconsistsofLDwhichcon-  
trolsthetransferofdatatotheselectedDACchannel, SDI(serial  
data/address input), CLK (shift register clock) and SDO (serial  
data output). When the LD signal is high, CLK signal loads the  
digital input bits (SDI) into the 12-bit shift register (4 bits address  
A3 to A0, then 8 bits data D7 to D0). The LD signal going low  
loads this data into the selected DAC. The LD signal going low  
also disables the serial data input (SDI), output (SDO 3-stated)  
and the CLK input. This design tremendously reduces digital  
noise, and glitch transients into the DACs due to free running  
CLK and SDI. Also, 3-stating the SDO output with LD signal  
would allow read back of pre-stored digital data of the selected  
package using one SDO wire for all DAC ICs on the board. Note  
alsothattheresetsignal(RST)resetsallanalogoutputsto1/2of  
VREF, regardless of any digital inputs. Note that the input VRi is  
referenced to AGND.  
Function  
A3 A2 A1 A0  
LD  
CLK  
RST  
SDI  
SDO  
01  
Shift Data In  
and Out  
Data Input  
Valid  
Data Output  
Valid  
X
X
X
X
X
X
X
X
1
1
1
Repeat  
Stop Shifting  
Data In and  
Out  
Hi-Z  
0
X
X
Load DACs  
0
0
0
0
0
0
0
0
1
0
0
0
0
1
1
1
1
0
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
No Operation  
10  
Hi-Z  
Hi-Z  
Hi-Z  
Hi-Z  
Hi-Z  
Hi-Z  
Hi-Z  
Hi-Z  
DAC 0  
DAC 1  
DAC 2  
DAC 3  
DAC 4  
DAC 5  
DAC 6  
DAC 7  
X
X
X
X
X
X
X
X
X
X
X
X
X
1
1
1
1
1
1
1
1
X
X
X
X
X
X
X
X
10  
10  
10  
10  
10  
10  
10  
No Operation  
No Operation  
No Operation  
Hi-Z  
Hi-Z  
X
X
1
1
1
1
1
1
0
1
1
1
Reset all DACs to  
X
X
X
X
X
X
0
X
X
V
REF/2  
Table 1. Digital Function Truth Table  
Serial In/Serial Out  
DAC Output Voltage  
VOi = AGND + (VRi – AGND) (  
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0  
D
256  
)
MSB  
LSB  
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
AGND  
1
(V – AGND) (  
) + AGND  
Ri  
256  
254  
256  
(V – AGND) (  
) + AGND  
) + AGND  
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
Ri  
255  
256  
(V – AGND) (  
Ri  
Table 2. DAC Transfer Function  
Analog Output vs. Digital Code  
Rev. 2.00  
9