MP7616
ORDERING INFORMATION
Package
Type
Temperature
INL
(LSB)
DNL
(LSB)
Gain Error
(% FSR)
Part No.
Range
–40 to +85°C
Plastic Dip
MP7616JN
+14
+16
+0.8
–40 to +85°C
–40 to +85°C
Plastic Dip
SOIC
MP7616KN
MP7616JS
+7
+8
+0.8
+0.8
+14
+16
–40 to +85°C
–40 to +85°C
SOIC
MP7616KS
MP7616JD
+7
+8
+0.8
+0.8
Ceramic Dip
+14
+16
–40 to +85°C
–55 to +125°C
Ceramic Dip
Ceramic Dip
MP7616KD
MP7616TD*
+7
+7
+8
+8
+0.8
+0.8
*Contact factory for non-compliant military processing
PIN CONFIGURATION
See Packaging Section for Package Dimensions
1
BIT 2
BIT 1 (MSB)
GND
N/C
BIT 3
BIT 4
24
23
22
1
22
BIT 3
BIT 2
2
3
2
21
20
19
18
17
16
15
14
13
12
BIT 4
BIT 5
BIT 6
BIT 7
BIT 8
BIT 9
BIT 10
BIT 11
BIT 1 (MSB)
GND
3
4
21
20
19
18
17
16
15
BIT 5
BIT 6
BIT 7
BIT 8
I
I
R
V
V
OUT2
5
4
I
I
OUT2
OUT1
5
6
OUT1
FB
7
6
R
FB
REF
8
7
BIT 9
V
V
REF
DD
9
8
BIT 10
BIT 11
BIT 12
BIT 13
BIT 16 (LSB)
BIT 15
BIT 14
DD
10
9
BIT 16 (LSB)
BIT 15
BIT 14
11
12
14
13
10
BIT 12
BIT 13
11
N/C
22 Pin CDIP, PDIP (0.400”)
D22, N22
24 Pin SOIC (Jedec, 0.300”)
S24
PIN OUT DEFINITIONS
DIP
SOIC
NAME
DESCRIPTION
No Connection
DIP
SOIC
NAME
N/C
DESCRIPTION
No Connection
1
N/C
13
14
15
16
17
18
19
20
21
22
23
24
1
2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
BIT 8
BIT 9
BIT 10
BIT 11
BIT 12
BIT 13
Data Input Bit 3
Data Input Bit 4
Data Input Bit 5
Data Input Bit 6
Data Input Bit 7
Data Input Bit 8
Data Input Bit 9
Data Input Bit 10
Data Input Bit 11
Data Input Bit 12
Data Input Bit 13
12
13
14
15
16
17
18
19
20
21
22
BIT 14
BIT 15
BIT 16
Data Input Bit 14
2
3
Data Input Bit 15
3
4
Data Input Bit 16 (LSB)
Positive Power Supply
Reference Input Voltage
Internal Feedback Resistor
Current Output 1
4
5
V
V
DD
5
6
REF
6
7
R
FB
7
8
I
I
OUT1
OUT2
8
9
Current Output 2
9
10
11
12
GND
BIT 1
BIT 2
Ground
10
11
Data Input Bit 1 (MSB)
Data Input Bit 2
Rev. 2.00
2