MP7543
PIN OUT DEFINITIONS
PDIP, CDIP and SOIC
PIN NO.
1
2
3
4
5
NAME
I
OUT1
I
OUT2
AGND
STB1
LD1
DESCRIPTION
DAC current output pin. Normally
terminated at op amp virtual ground.
DAC current output pin. Normally
terminated at AGND.
Analog Ground.
Register A Strobe 1 input,
See Table 1.
DAC Register B Load 1 input. When
LD1 and LD2 go low the contents of
Register A are loaded into DAC
Register B.
No Connection.
Serial Data Input to Register A.
Register A Strobe 2 input,
See Table 1.
DAC Register B Load 2 input. When
LD1 and LD2 go low the contents of
Register A are loaded into DAC
Register B.
Register A Strobe 3 input,
See Table 1.
Register A Strobe 4 input,
See Table 1.
Digital Ground.
Register B CLEAR input (active
LOW), can be used to asynchronously
reset Register B to 0000 0000 0000.
+5 V Supply Input.
Reference input. Can be positive or
negative DC voltage or AC signal.
DAC Feedback Resistor.
18
19
20
V
DD
V
REF
R
FB
13
14
15
16
17
STB3
STB4
DGND
N/C
CLR
8
9
10
11
12
N/C
SR1
STB2
N/C
LD2
4
5
6
7
PLCC
PIN NO.
1
2
3
NAME
N/C
I
OUT1
I
OUT2
AGND
STB1
N/C
LD1
DESCRIPTION
No Connection.
DAC current output pin. Normally
terminated at op amp virtual ground.
DAC current output pin. Normally
terminated at AGND.
Analog Ground.
Register A Strobe 1 input,
See Table 1.
No Connection.
DAC Register B Load 1 input. When
LD1 and LD2 go low the contents of
Register A are loaded into DAC
Register B.
No Connection.
Serial Data Input to Register A.
Register A Strobe 2 input,
See Table 1.
No Connection.
DAC Register B Load 2 input. When
LD1 and LD2 go low the contents of
Register A are loaded into DAC
Register B.
Register A Strobe 3 input,
See Table 1.
Register A Strobe 4 input,
See Table 1.
Digital Ground.
No Connection.
Register B CLEAR input (active
LOW), can be used to asynchronously
reset Register B to 0000 0000 0000.
+5 V Supply Input.
Reference input. Can be positive or
negative DC voltage or AC signal.
DAC Feedback Resistor.
6
7
8
9
N/C
SRI
STB2
LD2
10
11
12
13
STB3
STB4
DGND
CLR
14
15
16
V
DD
V
REF
R
FB
Rev. 2.00
3