XRP7724
Quad Channel Digital PWM/PFM
Programmable Power Management System
SMB
US
(I2C) I
NTERFACE
Parameter
Input Pin Low Level, V
IL
Input Pin High Level, V
IH
Hysteresis of Schmitt Trigger
inputs, V
hys
Output Pin Low Level (open
drain or collector), V
OL
Input leakage current
Output fall time from V
IHmin
to
V
ILmax
Internal Pin Capacitance
-10
20 + 0.1
Cb
0.7 VIO
0.05 VIO
0.4
10
250
1
Min.
Typ.
Max.
0.3 VIO
Units
V
V
V
V
µA
ns
pF
Conditions
VIO = 3.3 V ±10%
VIO = 3.3 V±10%
VIO = 3.3 V±10%
I
SINK
= 3mA
Input is between 0.1 VIO and 0.9 VIO
With a bus capacitance (Cb)from 10 pF to
400 pF
G
ATE
D
RIVERS
Parameter
GH, GL Rise Time
GH, GL Fall Time
Min.
Typ.
17
11
Max.
Units
ns
ns
Conditions
At 10-90% of full scale, 1nF C
load
GH, GL Pull-Up On-State Output
Resistance
GH, GL Pull-Down On-State
Output Resistance
GH, GL Pull-Down Resistance in
Off-Mode
Bootstrap diode forward
resistance
Minimum On Time
Minimum Off Time
Minimum Programmable Dead
Time
Maximum Programmable Dead
Time
Programmable Dead Time
Adjustment Step
4
2
50
9
50
125
20
Tsw
607
5
2.5
Ω
Ω
kΩ
Ω
ns
ns
ns
VCC = VCCD = 0V.
@ 10mA
1nF of gate capacitance.
1nF of gate capacitance
Does not include dead time variation from
driver output stage
Tsw=switching period
ps
© 2012 Exar Corporation
6/29
Rev. 1.0.1
EXAR [ EXAR CORPORATION ]
