CLC2011, CLC4011
Table 1 provides the recommended R for various capacitive
Layout Considerations
S
loads. The recommended R values result in approximately
S
General layout and supply bypassing play major roles in
high frequency performance. Exar has evaluation boards to
use as a guide for high frequency layout and as an aid in
device testing and characterization. Follow the steps below
as a basis for high frequency layout:
<1dB peaking in the frequency response. The Frequency
Response vs. CL plot, on page 6, illustrates the response
of the CLCx011.
ꢀ■
Include 6.8µF and 0.1µF ceramic capacitors for power supply
CL (pF)
RS (Ω)
-3dB BW (MHz)
decoupling
ꢀ■
Place the 6.8µF capacitor within 0.75 inches of the power pin
10pF
20pF
50pF
100pF
0
0
2.2
2.4
2.5
2
ꢀ■
Place the 0.1µF capacitor within 0.1 inches of the power pin
ꢀ■
Remove the ground plane under and around the part,
especially near the input and output pins to reduce parasitic
capacitance
0
100
ꢀ■
Minimize all trace lengths to reduce series inductances
Table 1: Recommended R vs. C
S
L
Refer to the evaluation board layouts below for more
information.
For a given load capacitance, adjust R to optimize the
S
tradeoff between settling time and bandwidth. In general,
Evaluation Board Information
reducing R will increase bandwidth at the expense of
S
The following evaluation boards are available to aid in the
testing and layout of these devices:
additional overshoot and ringing.
Overdrive Recovery
Evaluation Board #
CEB006
Products
An overdrive condition is defined as the point when either
one of the inputs or the output exceed their specified
voltage range. Overdrive recovery is the time needed for the
amplifier to return to its normal or linear operating point.The
recovery time varies, based on whether the input or output
is overdriven and by how much the range is exceeded.
The CLCx011 will typically recover in less than 50ns from
an overdrive condition. Figure 8 shows the CLC2011 in an
overdriven condition.
CLC2011 in SOIC
CLC2011 in MSOP
CLC4011 in TSSOP
CLC4011 in SOIC
CEB010
CEB019
CEB018
Evaluation Board Schematics
Evaluation board schematics and layouts are shown in
Figures 9-16 These evaluation boards are built for dual-
supply operation. Follow these steps to use the board in a
single-supply application:
1. Short -VS to ground.
2. Use C3 and C4, if the -VS pin of the amplifier is not
directly connected to the ground plane.
Figure 8: Overdrive Recovery
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exar.com/CLC2011
Rev 1D
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