6.7.5
SPI Status Register
The SPI Status register can be read by the host to determine when a SPI read or write
operation on the serial to parallel interface has completed. This register may also be used
to read the Flash device’s status.
Type:
Offset
Read only
x‘08CC’
Reserved
FLASH_WR_STATUS[7:0]
Reserved
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
Field Name
Description
Bits
Reset
Reserved
31:16
0
Reserved
FLASH_WR_STATUS[
7:0]
Flash Write Status.
This field is only valid for 4 byte flash write
operations.
15:8
7:1
0
0
The 820x will read this field to determine if the flash
write operation has completed.
Reserved
Reserved
SPI_OP_DONE
SPI Operation Done.
This bit is read only from the host. When a SPI
read/write operation is done, the 820x will assert
this signal.
0
1
When the host writes to the SPI Command Address
Register (Section 6.7.3), the 820x will automatically
clear this bit.
0
1
SPI read/write operation not done
SPI read/write operation done
820x – Data Sheet, DS-0157-D
Page194
Hifn Confidential
EXAR [ EXAR CORPORATION ]
