Preface
Welcome to the Data Sheet for Hifn’s 820x, a high performance, low power, compression/
encryption/hash acceleration processor. This document describes the 820x operation, data
structures, data flow and specifications.
Audience
This document is intended for:
• Project managers
• System engineers
• Hardware and software development engineers
• Marketing and product managers
Prerequisite
Before proceeding, you should generally understand:
• PCI Express
• GZIP, eLZS and AES algorithms
• Hash, MAC algorithms
• General networking concepts
Document Organization
This document is organized as follows:
Chapter 1, “Product Description" provides an overview of the 820x processor.
Chapter 2, “Operation" describes key features of the 820x operations.
Chapter 3, “Data Structures" defines the format of the data structures used by the 820x.
Chapter 4, “Data Flow" gives examples of the typical data flows within the 820x.
Chapter 5, “Modules" describes the internal 820x modules in more detail.
Chapter 6, “Register Definition" details the syntax and usage of the internal 820x registers.
Chapter 7, “PCIe Configuration Register Definition" details the syntax and usage of the
PCIe registers.
Chapter 8, “Signal Description" defines the external interfaces for the 820x device.
820x – Data Sheet, DS-0157-D
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Hifn Confidential
EXAR [ EXAR CORPORATION ]
