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8.2.8.7 Tree Leaf Insert Rope (TLIR)
TLIR inserts a leaf into the rope. The leaf must already be stored in TSR0 (done automatically by picocode
during TLIR) and the leaf address must already be available in LCBA0. TLIR maintains the rope, which
involves updating the PVA field in LUDefTable, the NLARope leaf field in control store, and the NLARope leaf
field stored in TSRx. The leaf is inserted into the rope ahead of the current leaf, which has address CLA. Field
PLA is updated to the new leaf address, which is LCBA0 / 1, in LUDefTable. Following TLIR execution, pico-
code must invoke MWR to write the leaf into control store. The contents of TSR1 and LCBA1 can be
destroyed because TLIR uses TSR1 and LCBA1 as a work area.
Table 8-63. TLIR Input Operands
Operand Source
Operand
Bit Length
Description
Direct
Indirect
LUDefIndex
LCBA0
8
Imm16(12:5)
GPR(7:0)
Defines entry in LUDefTable
26
Register
Address of leaf to be inserted into rope
The TSEDPA is the high order 4 bits of the thread’s shared memory
pool address (see 7.2.4 Shared Memory Pool on page 201) and is
constrained to be on a four-QW boundary. Only values of x‘8’, x‘A’,
x‘C’, and x‘E’ should be used.
TSEDPA
TSRx
4
Imm16(4:1)
Imm12(4:1)
Contents of leaf to be inserted into rope.
TSRx is mapped into the Shared Memory pool, starting at an offset of
4 QW past the QW indicated by the input TSEDPA parameter for a
length of 4 QW.
26
Shared Memory Pool
Table 8-64. TLIR Output Results
Result
TSRx
Bit Length
512
Source
Description
Shared Memory Pool Leaf NLA field has been updated
0
1
KO: Unsuccessful Operation
OK: Successful Operation
OK/KO
1
Flag
5NP4G Network Processor, Data Sheet, DS-0125-02
January 2006
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