5NP4G
Tree Search Engine
8.2.7.10 Read PSCB for Fast Table Update (RDPSCB_GDH)
RDPSCB_GDH reads a PSCB from the control store and stores it in one of the PSCBx locations in the
shared memory pool. For LPM, the entire PSCB is read from memory at the address given by PSCB.Addr
and stored in PSCB. For FM, the entire PSCB is read from memory and converted into a LPM PSCB format
and either NPA0/1 or LCBA0/1 will be set to all zero, since only one of the fields will be valid. This command
is not supported for SMT.
Structure for PSCB register shared memory pool is as follows:
Figure 8-12. Shared Memory Pool with PSCB Subfields
95
63
NP0
127
87
79
71
31
0
72
Address
(26 bits)
PSCBx
DPA
Reserved Index
Reserved Patbit
NPA0
NPA1
LCBA0
LCBA1
DPA+1
Reserved
NP1
Reserved (5 bits)
rdwrpscb_LPM_compact_PSCB_en (valid for 5NP4G-C (R3.x))
Table 8-44. RDPSCB_GDH Input Operands (Page 1 of 2)
Operand Source
Operand
Bit Length
Description
Direct
Indirect
The DPA_PSCB is a Full address of the7.2.4 Shared Memory Pool on
page 201. This indicates working address of the PSCB register.
Full PSCB will occupy 2 quadwords from shared memory pool. This
address must start at an even address.
DPA_PSCB
6
Imm16(5:0) Imm12(5:0)
Imm16(7:6) Imm12(7:6)
00
Result is based on PatBit value in the shared memory pool as
shown in above diagram.
PatBit = 0 Branch 0 entry of the PSCB is read
PatBit = 1 Branch 1 entry of the PSCB is read
Branch 0 entry of the PSCB is read
Branch 1 entry of the PSCB is read
Branch 0 and branch 1 entry of the PSCB is read
RdWrPSCB_Cntl
Reserved
2
1
01
10
11
Imm16(8)
Imm12(8) Reserved.
Tree Search Engine
Page 366 of 607
5NP4G Network Processor, Data Sheet, DS-0125-02
January 2006
EXAR [ EXAR CORPORATION ]
