5NP4G
Tree Search Engine
8.2.7.3 SMT Tree Search (TS_SMT)
Table 8-31. SMT Tree Search Input Operands
Operand Source
Operand
Bit Length
Description
Direct
Indirect
LUDefIndex
LCBANr
8
1
Imm16(12:5)
GPR(7:0) Defines entry in LUDefTable used to control the search
0
1
search results are stored in TSRx/LCBA0
search results are stored in TSRx/LCBA1
Imm16(0)
Imm12(0)
TSE Thread Shared Memory Pool Address - stores location of Key,
KeyLength, and Color and determines Leaf destination. The TSEDPA is
Imm12(4:1) the high order 4 bits of the thread’s shared memory pool address (see
7.2.4 Shared Memory Pool on page 201) and is constrained to be on a
four-QW boundary. Use only values of x‘8’, x‘A’, x‘C’, and x‘E’.
TSEDPA
4
Imm16(4:1)
Pattern to be searched, located in shared memory pool.
The key must be initialized only in the byte boundary of the key length.
Key
KeyLength
Color
192
8
Shared Memory Pool
Length of pattern minus 1 in key. Must be initialized before search.
Located in shared memory pool.
Shared Memory Pool
Used only when enabled in LUDefTable. Must be initialized before
search. Located in shared memory pool.
16
Shared Memory Pool
Following is available for GTH only.
Enables TSE read of LUDefCopy register
Can save clock cycles, especially when RDLUDEF is executed asyn-
chronously with the picocode that sets the key.
0
TSE reads LUDefTable
TSE does not read the LUDefTable and uses information con-
UseLUDefCopyReg
LUDefCopy
1
Imm16(13)
Imm12(5)
1
tained in LUDefCopy register. Assumes LUDefTable was read previ-
ously using RDLUDEF.
Note: UseLUDefCopyReg = ‘1’ is not supported for LUDefEntry with
Cache Enable.
Input only when UseLUDefCopyReg is ‘1’. Set to contents of
LUDefTable at entry given by LUDefIndex.
96
Register
Table 8-32. SMT Tree Search Results Output (Page 1 of 2)
Result
Bit Length
1
Source
Flag
Description
KO: Unsuccessful Operation
OK: Successful Operation
0
1
OK/KO
When OK is ‘1’, leaf is read and stored in TSRx.
TSRx is mapped into the Shared Memory pool, at an offset of 4 QW
past the starting QW indicated by the input TSEDPA parameter.
TSRx
512
Shared Memory Pool
That is, Shared Memory Pool QW location = TSEDPA*4 + 4
When OK is ‘1’, leaf address is stored in LCBA0 / 1
See Section 8.2.3.3 Cascade/Cache on page 326
See Section 8.2.3.3 Cascade/Cache on page 326
LCBA0 / 1
CacheFlags
NrPSCBs
26
3
Register
Register
Register
8
5NP4G Network Processor, Data Sheet, DS-0125-02
January 2006
Tree Search Engine
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