8.12 MDIO Timing
This device supports a subset of the 802.3-2002 MDIO management interface, also known
as the Management Data Input/Output (MDIO) Interface. This interface allows the 4450 to
monitor and control the PHY device(s) that are connected to the network side ports. If the
host system GMAC will control the system PHY device with its own MDIO connection, then
the 4450 pins are unused. When the 4450 acts as the sole system GMAC these pins are
used as defined in the 802.3 MDIO specification and referenced in Section 6.7. Hifn
includes Station Management (STM) Software as a part of it’s SDK.
The 4450 supports the low speed MDIO operating mode, and this is illustrated in Figure 8-
11. In this mode, the MDC clock signal operates at a frequency of 2.5 MHz.
Figure 8-11. Low-speed MDIO Operation
Table 8-13. MDIO Timing
Symbol
Tsu
Parameter
Min
10
10
0
Max
Units
ns
MDIO Setup prior to MDC High
MDIO Hold after MDC High
MDC to MDIO Output Delay
Thold
Tprop
ns
20
ns
4450 – Data Sheet, DS-0131-06
Page79
Hifn Confidential
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