MAC
4450
nx_txc
nx_clk_1
nx_ctrl_1
TXC
nx_txd[4]
nx_txd[3:0]
TX_CTL
TD[3:0]
nx_bus1[3:0]
nx_rxc
nx_clk_0
nx_ctrl_0
RXC
nx_rxd[4]
RX_CTL
RD[3:0]
nx_rxd[3:0]
nx_bus0[3:0]
Note
1. nx = n0 or n1.
Figure 6-14. Network RTBI PHY-Mode
6.2.3.3
Network MAC RGMII/RTBI Pin Descriptions
Table 6-10 contains the pin descriptions for the RGMII/RTBI network interface ports when
configured in MAC mode.
Table 6-10. 4450 RGMII/RTBI Network pin descriptions - MAC mode
Pin Name
RGMII/RTBI Signal
I/O
Description
nx_clk_1
nx_rxc
in
The receive reference clock will be 125MHz,
25MHz or 2.5MHz.
nx_ctrl_1
RGMII: nx_rx_ctl
RTBI: nx_rxd[4]
in
In RTBI mode, contains the fifth bit on the
rising edge of rxc and the tenth bit on the
falling edge of rxc.
In RGMII mode, rxdv on the rising edge of
rxc and a logical derivative of rxdv (i.e. rxdv
XOR rxerr) on the falling edge of rxc.
nx_bus1[3:0]
nx_clk_0
nx_rxd[3:0]
nx_txc
in
In RTBI mode, contains bits [3:0] on the
rising edge of rxc and bits [8:5] on the
falling edge of rxc.
In RGMII mode, bit [3:0] on rising edge of
rxc, bits [7:4] on the falling edge of rxc.
out
The transmit reference clock will be 125MHz,
25MHz or 2.5MHz.
4450 – Data Sheet, DS-0131-06
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