EUP9261
DP pin
0V battery charge inhibition function*1
The DP pin is a test pin for delay time measurement
and for output delay time reduction or bypass. It should
be open or VDD level in the actual application.
For reducing delay time, connect this pin with a 300kΩ
resistor to VSS. An internal clock can be measured.
Under this condition, output delay time of over-charge,
over-discharge, over-current1 and over-current2 can be
shorter than the setting value (delay time for over
charge becomes about 1/64 of normal state).
This function inhibits the recharging when a battery
which is short-circuited (0V) internally is connected.
When the battery voltage is 0.6V (typ.) or lower, the
charging control FET gate is fixed to EB- pin voltage to
inhibit charging. When the battery voltage is the 0V
battery charge inhibition battery voltage (V0INH) or
higher, charging can be performed.
By forcing this pin to VSS, output delay time circuit can
be disabled.
*1.Some battery providers do not recommend
charging for completely self-discharged battery.
Please ask battery providers before determining
the 0V battery charge function.
0V battery charge function*1*2
*2.The 0V battery charge function has higher priority
than the abnormal charge current detection
function. Consequently, a product with the 0V
battery charge function charges a battery forcedly
and abnormal charge current cannot be detected
when the battery voltage is low.
This function is used to recharge the connected battery
whose voltage is 0V due to the self-discharge.
When the 0V battery charge starting charge voltage
(V0CHA) or higher is applied between EB+ pin and
EB-pin by connecting a charger, the charging control
FET gate is fixed to VDD pin voltage. When the voltage
between the gate and source of the charging control
FET becomes equal to or higher than the turn-on
voltage e by the charger voltage, the charging control
FET turns on to start charging. At this time, the
discharging control FET is off and the charging current
flows through the internal parasitic diode in the
discharging control FET. When the battery voltage
becomes equal to or higher than the overdischarge
release voltage (VDU), the EUP9261 enters the normal
condition.
DS9261 Ver2.4 Jan. 2007
19
EUTECH [ EUTECH MICROELECTRONICS INC ]
