EUP8084
ESR is a direct function of the volume of the capacitor;
that is, physically larger capacitors have lower ESR.
Once the ESR requirement for COUT has been met, the
RMS current rating generally far exceeds the IRIPPLE(P-P)
requirement. The output ripple ∆VOUT is determined by:
Any good quality ceramic, tantalum, or film capacitor
may be used at the input. If a tantalum capacitor is used
at the input, it must be guaranteed by the manufacturer to
have asurge current rating sufficient for the application.
No-Load Stability
The regulator will remain stable and in regulation with no
external load. This is specially important in CMOS RAM
keep-alive applications.
1
∆V
OUT
≅ ∆I ESR +
L
8fC
OUT
Output Capacitance
When choosing the input and output ceramic capacitors,
choose the X5R or X7R dielectric formulations. These
dielectrics have the best temperature and voltage
characteristics of all the ceramics for a given value and
size.
The regulator is specifically designed to employ ceramic
output capacitors as low as 2.2µF. Ceramic capacitors
below 10µF offer significant cost and space savings,
along with high frequency noise filtering. Higher values
and other types and of capacitor may be used, but their
equivalent series resistance (ESR) should be maintained
below 0.5Ω. Ceramic capacitor of the value required by
the regulator are available in the following dielectric
types: Z5U, Y5V, X5R, and X7R. The Z5U and Y5V
types exhibit a 50% or more drop in capacitance value as
their temperature increase from 25°C, an important
consideration. The X5R generally maintain their
capacitance value within ± 20%. The X7R type are
desirable for their tighter tolerance of 10% over
temperature.
Output Voltage Programming
The output voltage is set by a resistive divider according
to the following formula:
R
FB1
V
= 0.6V 1+
OUT
R
FB2
The external resistive divider is connected to the output,
allowing remote voltage sensing as shown in Figure 5.
Power Dissipation and Junction Temperature
Specified regulator operation is assured to a junction
temperature of 160°C; the maximum junction
temperature should be restricted to 160°C under normal
operating conditions. This restriction limits the power
dissipation the regulator can handle in any given
application. To ensure the junction temperature is within
acceptable limits, calculate the maximum allowable
dissipation, PD(max), and the actual dissipation, PD, which
must be less than or equal to PD(max)
Figure 5.
The maximum-power-dissipation limit is determined
using the following equation:
LINEAR REGULATOR
External Capacitors
T max − T
J
=
A
P
D(max)
R
Like any low-dropout regulator, the regulator requires
external capacitors for regulator stability. The regulator is
specifically designed for portable applications requiring
minimum board space and smallest components. These
capacitors must be correctly selected for good
performance.
θJA
Where:
TJMAX is the maximum allowable junction temperature.
R
θJA is the thermal resistance junction-to-ambient for the
package
TA is the ambient temperature.
Input Capacitor
The regulator dissipation is calculated using:
A minimum input capacitance of 1µF is required between
the regulator input pin and ground (the amount of the
capacitance may be increased without limit).This
capacitor must be located a distance of not more than
1cm from the input pin and returned to a clean analog
ground.
P
= V
− V
VOUTA
× I
D
INA
OUTA
Power dissipation resulting from quiescent current is
negligible. Excessive power dissipation triggers the
thermal protection circuit.
DS8084 Ver1.0 Apr. 2008
21
EUTECH [ EUTECH MICROELECTRONICS INC ]
