EUP7982
Application Information
External Capacitors
Noise Bypass Capacitor
Connecting a 33nF capacitor between the CBYPASS pin and
ground significantly reduces noise on the regulator output.
This cap is connected directly to a high impedance node
in the bandgap reference circuit. Any significant loading
on this node will cause a change on the regulated output
voltage. For this reason, DC leakage current through this
pin must be kept as low as possible for best output
voltage accuracy. The types of capacitors best suited for
the noise bypass capacitor are ceramic and film.
Like any low-dropout regulator, the EUP7982 requires
external capacitors for regulator stability. The EUP7982
is specifically designed for portable applications
requiring minimum board space and smallest components.
These capacitors must be correctly selected for good
performance.
Input Capacitor
A minimum input capacitance of 1µF is required between
the EUP7982 input pin and ground (the amount of the
capacitance may be increased without limit).This
capacitor must be located a distance of not more than
1cm from the input pin and returned to a clean analog
ground.
Unlike many other LDO’s , addition of a noise reduction
capacitor does not effect the load transient response of
the device. However, it does affect start-up time. The
smaller the capacitance value, the quicker the start-up
time.
1µF ceramic capacitor are fine for most end use
applications. If a tantalum capacitor is used at the input,
it must be guaranteed by the manufacturer to have asurge
current rating sufficient for the application.
Power Dissipation and Junction Temperature
Specified regulator operation is assured to a junction
temperature of 125°C; the maximum junction
temperature should be restricted to 125°C under normal
operating conditions. This restriction limits the power
dissipation the regulator can handle in any given
application. To ensure the junction temperature is within
acceptable limits, calculate the maximum allowable
dissipation, PD(max), and the actual dissipation, PD, which
must be less than or equal to PD(max)
No-Load Stability
The EUP7982 will remain stable and in regulation with
no external load. This is specially important in CMOS
RAM keep-alive applications.
Output Capacitance
The maximum-power-dissipation limit is determined
using the following equation:
The EUP7982 is specifically designed to employ ceramic
output capacitors as low as 2.2µF. Ceramic capacitors
below 10µF offer significant cost and space savings,
along with high frequency noise filtering. Higher values
and other types and of capacitor may be used, but their
equivalent series resistance (ESR) should be maintained
below 0.5Ω. Ceramic capacitor of the value required by
the EUP7982 are available in the following dielectric
types: Z5U, Y5V, X5R, and X7R. The Z5U and Y5V
types exhibit a 50% or more drop in capacitance value as
their temperature increase from 25°C, an important
consideration. The X5R generally maintain their
capacitance value within ± 20%. The X7R type are
desirable for their tighter tolerance of 10% over
temperature.
T max − T
J
=
A
P
D(max)
R
θJA
Where:
TJmax is the maximum allowable junction temperature.
R
θJA is the thermal resistance junction-to-ambient for the
package
TA is the ambient temperature.
The regulator dissipation is calculated using:
PD=(VI-VO) × IO
Power dissipation resulting from quiescent current is
negligible. Excessive power dissipation triggers the
thermal protection circuit.
DS7982 Ver 1.4 May.2005
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