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EUP7966-18DIR1 参数 Datasheet PDF下载

EUP7966-18DIR1图片预览
型号: EUP7966-18DIR1
PDF下载: 下载PDF文件 查看货源
内容描述: 2A低压降稳压器与启用 [2A Low-Dropout Regulator with Enable]
分类和应用: 稳压器电源电路
文件页数/大小: 11 页 / 396 K
品牌: EUTECH [ EUTECH MICROELECTRONICS INC ]
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EUP7966  
Application Note  
External Capacitors  
The maximum allowable value for junction to ambient  
Thermal Resistance, θJA, can be calculated using the  
formula:  
To assure regulator stability, input and output capacitors  
are required as shown in the Typical Application Circuit.  
Output Capacitor  
The EUP7966 is designed specifically to work with very  
small ceramic output capacitors. A ceramic capacitor  
(temperature characteristics X7R, X5R, Z5U, or Y5V) in  
4.7 to 22µF range with 5mto 200mESR range is  
suitable in the EUP7966 application circuit.  
θJA=TRmax/PD  
Heatsinking for the SOP-8 (FD) package is  
accomplished by allowing heat to flow through the  
ground slug on the bottom of the package into the  
copper on the PC board. The heat slug must be  
soldered down to a copper plane to get good heat  
transfer. It can also be connected through vias to  
internal copper planes .Since the heat slug is at ground  
potential, traces must not be routed under it which are  
not at ground potential. Under all possible conditions,  
the junction temperature must be within the range  
specified under operating conditions.  
The output capacitor must meet the requirement for  
minimum amount of capacitance and also have an ESR  
(Equivalent Series Resistance) value which is within a  
stable range (5mto 200m)  
Input Capacitor  
The input capacitor must be at least 10 µF ceramic, but  
can be increased without limit. It’s purpose is to provide a  
low source impedance for the regulator input.  
Bias Capacitor  
The 1µF capacitor on the bias line can be any good  
quality capacitor (ceramic is recommended).  
Bias Voltage  
The bias voltage is an external voltage rail required to  
get gate drive for the N-FET pass transistor. Bias  
voltage must be in the range of 4.5 – 5.5V to assure  
proper operation of the part.  
Shutdown Operation  
Pulling down the VEN pin will turn-off the regulator.  
VEN pin must be actively terminated through a pull-up  
resistor (10 kΩ to 100 kΩ) for a proper operation. If this  
pin is driven from a source that actively pulls high and  
low (such as a CMOS rail to rail comparator) , the pull-up  
resistor is not required. This pin must be tied to VIN if  
not used.  
Power Dissipation /Heatsinking  
A heatsink may be required depending on the  
maximum power dissipation and maximum ambient  
temperature of the application. Under all possible  
conditions, the junction temperature must be within the  
range specified under operating conditions. The total  
power dissipation of the device is given by:  
PD=(VIN-VOUT)IOUT+(VIN)IGND  
where IGND is the operating ground current of the  
device. The maximum allowable temperature rise  
on the maximum ambient temper  
) depends  
(TRmax  
-ature (TAmax) of the appli  
cation, and the maximum  
allowable junction temperature (TJmax):  
TRmax=TJmax-TAmax  
DS7966 Ver1.0 Aug. 2006  
10