EUP3410/3411
crossover frequency, fC, of 40KHz. Lower crossover
frequency results in slower loop response and poor load
transient performance. Higher crossover frequency can
result in loop instability.
Output Rectifier Diode
The output rectifier diode supplies the current to the
inductor when the high-side switch is off. A schottky
diode is recommended to reduce losses due to the diode
forward voltage and recovery times.
Table 1. Compensation Values for Typical Output
Voltage /Capacitor Combinations
Loop Compensation
V
C7
R1
C5
C4
OUT
The system stability is controlled through the COMP pin.
COMP is the output of the internal transconductance
error amplifier. A series capacitor-resistor combination
sets a pole-zero combination to control the feedback
loop.
2.5V
22µF Ceramic
22µF Ceramic
22µF Ceramic
22µF Ceramic
560µF/6.3V
10K
10K
10K
10K
ꢀ
3.9nF None
3.9nF None
3.9nF None
3.9nF None
3.3V
5V
ꢀ
ꢀ
ꢀ
12V
The DC loop gain is:
2.5V
3.3V
5V
10K
10K
10K
10K
ꢀ
ꢀ
ꢀ
ꢀ
30nF
39nF
47nF
56nF
None
None
None
None
(30mꢀ
ESR)
560µF/6.3V
(30m ESR)
470µF/10V
(30m ESR)
220µF/25V
(30m ESR)
AVDC
=
VFB / VOUT ∗ AVEA ∗ GCS ∗ RLOAD
( )
ꢀ
Where:
ꢀ
VFB is the feedback threshold voltage, 1.2V
VOUT is the desired output regulation voltage
AVEA is the transconductance error amplifier voltage
gain, 400 V/V
GCS is the current sense gain, (roughly the output current
divided by the voltage at COMP), 2A/V
12V
ꢀ
The values of the compensation components listed in
Table 1 yield a stable control loop for the given output
voltage.
RLOAD is the load resistance (VOUT / IOUT where IOUT is
the output load current)
The system has 2 poles. One is due to the compensation
capacitor (C5), and the other is due to the output
capacitor (C7). These are:
fP1 = GEA / 2π ∗ AVEA ∗ C5
( )
Where P1 is the first pole, and GEA is the error amplifier
transconductance (660µA/V).
and
fP2 = 1/ 2π ∗ R LOAD ∗ C7
( )
The system has one zero of importance, due to the
compensation capacitor (C5) and the compensation
resistor (R1). The zero is:
fZ1 = 1/ 2π ∗ R1∗ C5
( )
If a large value capacitor (C7) with relatively high
equivalent-series-resistance (ESR) is used, the zero due
to the capacitance and ESR of the output capacitor can
be compensated by a third pole set by R1 and C4. The
pole is:
fP3 =1/ 2π ∗ R1∗ C4
( )
The system crossover frequency (the frequency where
the loop gain drops to 1, or 0dB) is important. A good rule
of thumb is to set the crossover frequency to
approximately 1/10 of the switching frequency. In this
case, the switching frequency is 380KHz, therefore use a
DS3410/3411 Ver1.2 Nov. 2008
10
EUTECH [ EUTECH MICROELECTRONICS INC ]
