Preliminary
Pin Configurations
Package Type
Pin Configurations
EUP2618
TSSOP-16
Pin Description
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
NAME
RDY
FB
COMP
IN
GND
REF
FBP
FBN
SHDN
DESCRIPTION
Active-Low, Open-Drain Output. Indicates all outputs are ready. The on-resistance is 125Ω (typ).
Main Boost Regulator Feedback Input. Regulates to 1.25V nominal. Connect feedback resistive
divider to analog ground (GND).
Main Boost Compensation Network Connection.
Supply Input. 2.5V to 5.5V input range. Bypass with a 0.1µF capacitor between IN and GND, as
close to the pins as possible.
Analog Ground. Connect to power ground (PGND) underneath the IC.
Internal Reference Bypass Terminal. Connect a 0.22µF capacitor from this terminal to analog
ground (GND). External load capability to 100µA.
Positive Charge-Pump Regulator Feedback Input. Regulates to 1.25V nominal. Connect feedback
resistive divider to analog ground (GND).
Negative Charge-Pump Regulator Feedback Input. Regulates to 0V nominal.
Active-Low Logic-Level Shutdown Input. Connect
SHDN
to IN for normal operation.
Negative Charge-Pump Driver Output. Output high level is V
SUPN
, and low level is TGND.
Negative Charge-Pump Driver Supply Voltage. Bypass to TGND with a 0.1µF capacitor.
Positive Charge-Pump Driver Output. Output high level is V
SUPP
, and low level is TGND.
Positive Charge-Pump Driver Supply Voltage. Bypass to TGND with a 0.1µF capacitor.
Power Ground of Charge-Pumps.
Main Boost Regulator Power MOSFET n-Channel Drain. Connect output diode and output
capacitor as close to PGND as possible.
Power Ground of Main Boost.
DRVN
SUPN
DRVP
SUPP
TGND
LX
PGND
DS2618 Ver0.1
Nov. 2007
3