EUA6027A
Application Information
Shutdown Modes
The EUA6027A employs a shutdown mode of operation
designed to reduce supply current, IDD, to the absolute
minimum level during periods of nonuse for battery-power
conservation. The
input terminal should be
SHUTDOWN
The value of
Ci is important to
held high during normal operation when the amplifier is in
use. Pulling low causes the outputs to mute
consider as it directly affects the bass (low frequency)
performance of the circuit. Consider the example where Zi
is 70kΩ and the specification calls for a flat bass response
down to 40Hz. Equation 2 is reconfigured as equation 2.
SHUTDOWN
and the amplifier to enter
a
low-current state,
IDD=150µA.
should never be left
SHUTDOWN
unconnected because amplifier operation would be
unpredictable.
1
Ci =
----------------------------(2 )
Gain Setting via GAIN0 and GAIN1 Inputs
The gain of the EUA6027A is set by two input terminals,
GAIN0 and GAIN1.
2π Z fC
i
In this example, Ci is 56nF so one would likely choose a
value in the range of 56nF to 1µF. A further consideration
for this capacitor is the leakage path from the input source
through the input network (Ci) and the feedback network to
the load. This leakage current creates a dc offset voltage at
the input to the amplifier that reduces useful headroom,
especially in high gain applications. For this reason, a low-
leakage tantalum or ceramic capacitor is the best choice.
When polarized capacitors are used, the positive side of the
capacitor should face the amplifier input in most
applications as the dc level there is held at VDD/2, which is
likely higher than the source dc level. Note that it is
important to confirm the capacitor polarity in the
application.
Table 1 .Gain Settings
Input
GAIN0
GAIN1
AV(inv)
Impedance
90kΩ
0
0
1
1
0
1
0
1
6dB
10dB
70kΩ
15.6dB
21.6dB
45kΩ
25kΩ
The gains listed in Table 1 are realized by changing the taps
on the input resistors inside the amplifier. This causes the
input impedance, ZI, to be dependent on the gain setting.
The actual gain settings are controlled by ratios of resistors,
so the actual gain distribution from part-to-part is quite
good. However, the input impedance will shift by 30% due
to shifts in the actual resistance of the input impedance.
For design purposes, the input network (discussed in the
next section) should be designed assuming an input
impedance of 10 kΩ, which is the absolute minimum input
impedance of the EUA6027A. At the higher gain settings,
the input impedance could increase to as high as 115 kΩ.
The typical input impedance at each gain setting is given in
Table 1.
Power Supply Decoupling, (CS)
The EUA6027A is a high-performance CMOS audio
amplifier that requires adequate power supply decoupling to
ensure the output total harmonic distortion (THD) is as low
as possible. Power supply decoupling also prevents
oscillations for long lead lengths between the amplifier and
the speaker. The optimum decoupling is achieved by using
two capacitors of different types that target different types
of noise on the power supply leads. For higher frequency
transients, spikes, or digital hash on the line, a good low
equivalent-series-resistance (ESR) ceramic capacitor,
typically 0.1µF placed as close as possible to the device
VDD lead, works best. For filtering lower-frequency noise
signals, a larger aluminum electrolytic capacitor of 10µF or
greater placed near the audio power amplifier is
recommended.
Input Capacitor, Ci
In the typical application an input capacitor, Ci, is required
to allow the amplifier to bias the input signal to the proper
dc level for optimum operation. In this case, Ci and the input
impedance of the amplifier, Zi, form a high-pass filter with
the corner frequency determined in equation 1.
1
f
=
-----------------(1)
c(highpass)
2π Z C
i
i
DS6027A Ver 1.1 June 2008
11
EUTECH [ EUTECH MICROELECTRONICS INC ]
