EUA5202
Pin Configurations
Package
Pin Configurations
TSSOP-24 with Thermal
Pad, exposure on the bottom
of the package
Pin Description
PIN
PIN
16
6
I/O
DESCRIPTION
Input MUX control input, hold high to select LHP IN or RHP IN (5, 20), hold
low to select LLINE IN or RLINE IN (4, 21)
I
HP/LINE
LBYPASS
Tap to voltage divider for left channel internal mid-supply bias
Left channel headphone input, selected when
terminal (16) is held
HP/LINE
LHPIN
5
I
high
LLINE IN
LOUT+
LOUT-
4
3
10
I
Left channel line input, selected when
terminal (16) is held low
HP/LINE
O
Left channel + output in BTL mode, + output in SE mode
O
Left channel - output in BTL mode, high-impedance state in SE mode
1,12,13,
24
GND/HS
Ground connection for circuitry, directly connected to thermal pad
LVDD
MUTE IN
MUTE OUT
NC
7
I
I
O
Supply voltage input for left channel and for primary bias circuits
Mute all amplifiers, hold low for normal operation, hold high to mute
Follows MUTE IN terminal (11), provides buffered output
No internal connection
11
9
17,23
19
RBYPASS
Tap to voltage divider for right channel internal mid-supply bias
Right channel headphone input, selected when
terminal (16) is held
HP/LINE
RHPIN
20
I
high
RLINEIN
ROUT+
ROUT-
RVDD
SE/BTL
SHUTDOWN
21
22
15
18
14
8
I
O
O
I
Right channel line input, selected when
terminal (16) is held low
HP/LINE
Right channel + output in BTL mode, + output in SE mode
Right channel - output in BTL mode, high-impedance state in SE mode
Supply voltage input for high channel
I
Hold low foe BTL mod, hold high for SE mode
I
Places entire IC in shutdown mode when held high, IDD=5µA
Sources a current proportional to the junction temperature. This terminal should
be left unconnected during normal operation.
TJ
2
O
DS5202 Ver 1.6 May. 2005
3