Et r on Tech
EM6A9325
4M x 32 LPSDRAM
Mode Resistor Bitmap
BA1
0
BA0
0
A11
0
A10
0
A9
W.B.L
A8
A7
A6
A5
A4
A3
BT
A2
A1
A0
TM
CAS Latency
Burst Length
A9
0
1
Length
Burst
Single Bit
A8
0
1
A7
0
0
Mode
A3
0
1
Type
Sequential
Interleave
Normal
Reserved
Reserved
0
1
A6
0
0
0
0
A5
0
0
1
1
A4
0
1
0
1
CAS Latency
Reserved
1 clock
2 clocks
3 clocks
Reserved
A2
A1
0
0
1
1
A0
0
1
0
1
Burst Length
0
0
0
0
1
1
2
4
8
1
0
1
1
1
Full Page (Sequential)
All other Reserved
All other Reserved
Burst Definition, Addressing Sequence of Sequential and Interleave Mode
Start Address
Burst Length
2
Sequential
Interleave
A2
X
X
X
X
X
X
0
A1
X
X
0
0
1
A0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0, 1
1, 0
0, 1, 2, 3
1, 2, 3, 0
2, 3, 0, 1
3, 0, 1, 2
0, 1
1, 0
0, 1, 2, 3
1, 0, 3, 2
2, 3, 0, 1
3, 2, 1, 0
4
1
0
0, 1, 2, 3, 4, 5, 6, 7
1, 2, 3, 4, 5, 6, 7, 0
2, 3, 4, 5, 6, 7, 0, 1
3, 4, 5, 6, 7, 0, 1, 2
4, 5, 6, 7, 0, 1, 2, 3
5, 6, 7, 0, 1, 2, 3, 4
6, 7, 0, 1, 2, 3, 4, 5
7, 0, 1, 2, 3, 4, 5, 6
0, 1, 2, 3, 4, 5, 6, 7
1, 0, 3, 2, 5, 4, 7, 6
2, 3, 0, 1, 6, 7, 4, 5
3, 2, 1, 0, 7, 6, 5, 4
4, 5, 6, 7, 0, 1, 2, 3
5, 4, 7, 6, 1, 0, 3, 2
6, 7, 4, 5, 2, 3, 0, 1
7, 6, 5, 4, 3, 2, 1, 0
0
0
0
1
0
1
8
1
0
1
0
1
1
1
1
Preliminary
12
Rev 0.4
June 2003
ETRON [ ETRON TECHNOLOGY, INC. ]
