EtronTech
EM6A9320BI
4Mx32 DDR SDRAM
Figure 6. Write with Auto Precharge (Burst Length = 4)
0
1
2
3
4
5
6
CK#
CK
Write with Auto Precharge
Bank can be Active after Auto Precharge
CMD
ACT
WRA
Valid
A0-11,
BA0-1
Valid
tWR
tRP
DQS
DQ
Begin of Auto Precharge
DQ0 DQ1 DQ2 DQ3
Figure 7. Read Burst Interrupt by Read (CAS Letancy = 3, Burst Length = 4)
0
1
2
3
4
5
6
7
8
CK#
CK
tCCD
CMD
RDa
RDb
Valid
A0-11,
BA0-1
Valid
DQS
DQ
Db0 Db1 Db2 Db3
Da0 Da1
Figure 8. Write Interrupted by Write (Burst Length = 4)
0
1
2
3
4
CK#
CK
tCCD
CMD
WRa
WRb
Valid
A0-11,
BA0-1
Valid
DQS
DQ
Db0 Db1 Db2 Db3
Da0 Da1
Figure 9. Auto Refresh Timimg
CK
tRP
tRFC
CMD
PRE
Precharge
AFRF
CMD
Auto Refresh
15
Rev 0.9C
May 2006
ETRON [ ETRON TECHNOLOGY, INC. ]
