欢迎访问ic37.com |
会员登录 免费注册
发布采购

EM6A9160TS-3.6G 参数 Datasheet PDF下载

EM6A9160TS-3.6G图片预览
型号: EM6A9160TS-3.6G
PDF下载: 下载PDF文件 查看货源
内容描述: 8M ×16的DDR同步DRAM (SDRAM)的 [8M x 16 DDR Synchronous DRAM (SDRAM)]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 29 页 / 275 K
品牌: ETRON [ ETRON TECHNOLOGY, INC. ]
 浏览型号EM6A9160TS-3.6G的Datasheet PDF文件第8页浏览型号EM6A9160TS-3.6G的Datasheet PDF文件第9页浏览型号EM6A9160TS-3.6G的Datasheet PDF文件第10页浏览型号EM6A9160TS-3.6G的Datasheet PDF文件第11页浏览型号EM6A9160TS-3.6G的Datasheet PDF文件第13页浏览型号EM6A9160TS-3.6G的Datasheet PDF文件第14页浏览型号EM6A9160TS-3.6G的Datasheet PDF文件第15页浏览型号EM6A9160TS-3.6G的Datasheet PDF文件第16页  
EtronTech
Parameter & Test Condition
8Mx16 DDR SDRAM
EM6A9160
5
Recommended D.C. Operating Conditions (V
DD
= 2.5V
±
5%, Ta = 0~70
°C)
Symbol
3.3 3.6 4
Max
Unit Notes
OPERATING CURRENT :
One bank; Active-Precharge;
t
RC
=t
RC
(min); t
CK
=t
CK
(min); DQ,DM and DQS inputs
changing once per clock cycle; Address and control
inputs changing once every two clock cycles.
OPERATING CURRENT :
One bank; Active-Read-
Precharge; BL=4; CL=4; tRCDRD=4*t
CK
; t
RC
=t
RC
(min);
t
CK
=t
CK
(min); lout=0mA; Address and control inputs
changing once per clock cycle
PRECHARGE POWER-DOWN STANDBY CURRENT:
All banks idle; power-down mode; t
CK
=t
CK
(min);
CKE=LOW
IDLE STANDLY CURRENT :
CKE = HIGH;
CS#=HIGH(DESELECT); All banks idle; t
CK
=t
CK
(min);
Address and control inputs changing once per clock
cycle; V
IN
=V
REF
for DQ, DQS and DM
ACTIVE POWER-DOWN STANDBY CURRENT :
one
bank active; power-down mode; CKE=LOW;
t
CK
=t
CK
(min)
ACTIVE STANDBY CURRENT :
CS#=HIGH;CKE=HIGH; one bank active ;
t
RC
=t
RC
(max);t
CK
=t
CK
(min);Address and control inputs
changing once per clock cycle; DQ,DQS,and DM inputs
changing twice per clock cycle
OPERATING CURRENT BURST READ :
BL=2; READS;
Continuous burst; one bank active; Address and control
inputs changing once per clock cycle; t
CK
=t
CK
(min);
lout=0mA;50% of data changing on every transfer
OPERATING CURRENT BURST Write :
BL=2;
WRITES; Continuous Burst ;one bank active; address
and control inputs changing once per clock cycle;
t
CK
=t
CK
(min); DQ,DQS,and DM changing twice per clock
cycle; 50% of data changing on every transfer
AUTO REFRESH CURRENT :
t
RC
=t
RFC
(min);
t
CK
=t
CK
(min)
SELF REFRESH CURRENT:
Sell Refresh Mode ;
CKE<=0.2V;t
CK
=t
CK
(min)
BURST OPERATING CURRENT 4 bank operation:
Four bank interleaving READs; BL=4;with Auto
Precharge; t
RC
=t
RC
(min); t
CK
=t
CK
(min); Address and
control inputschang only during Active, READ , or WRITE
command
IDD0
200 180 160 140 mA
IDD1
220 200 180 160 mA
IDD2P
50
45
40
35 mA
IDD2N
110 100
90
80 mA
IDD3P
50
45
40
35 mA
IDD3N
120 110 100
90 mA
IDD4R
340 310 280 250 mA
IDD4W
280 260 240 220 mA
IDD5
IDD6
270 250 230 210 mA
2
2
2
2
mA
IDD7
440 400 360 330 mA
12
Rev. 1.4
May 2006