EtronTech
Operation Mode
8Mx16 DDR SDRAM
EM6A9160
Fully synchronous operations are performed to latch the commands at the positive edges of CK. Table 2
shows the truth table for the operation commands.
Table 2. Truth Table (Note (1), (2) )
Command
BankActivate
BankPrecharge
PrechargeAll
Write
Write and AutoPrecharge
Read
Read and Autoprecharge
Mode Register Set
Extended MRS
No-Operation
Burst Stop
Device Deselect
AutoRefresh
SelfRefresh Entry
SelfRefresh Exit
State
Idle
(3)
Any
Any
Active
(3)
Active
(3)
Active
(3)
Active
(3)
Idle
Idle
Any
Active
(4)
Any
Idle
Idle
Idle
(SelfRefresh)
CKE
n-1
CKE
n
UDM UDM BS
0,1
A
10
A
0-9,11
/CS /RAS /CAS /WE
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
H
L
H
L
H
X
X
X
X
X
X
X
X
X
X
X
X
H
L
H
L
H
L
H
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
L
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
L
X
X
X
X
X
X
X
X
X
X
X
V
V
X
V
V
V
V
Row address
L
H
L
H
L
H
X
X
Column
address
(A0 ~ A8)
Column
address
(A0 ~ A8)
L
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
L
L
H
H
X
L
L
X
H
X
H
X
H
X
V
X
H
X
X
H
H
H
L
L
L
L
L
L
H
H
X
L
L
X
H
X
H
X
H
X
V
X
H
X
X
H
L
L
L
L
H
H
L
L
H
L
X
H
H
X
H
X
H
X
H
X
V
X
H
X
X
OP code
OP code
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
L
L
H
L
L
H
L
H
L
H
L
H
L
H
L
X
Precharge Power Down Mode
Entry
Precharge Power Down Mode
Exit
Active Power Down Mode
Entry
Active Power Down Mode Exit
Idle
Any
(PowerDown)
Active
Any
(PowerDown)
Data Input Mask Disable
Data Input Mask Enable(5)
Active
Active
H
X
H
H
X
X
X
X
Note:
1. V=Valid data, X=Don't Care, L=Low level, H=High level
2. CKE
n
signal is input level when commands are provided.
CKE
n-1
signal is input level one clock cycle before the commands are provided.
3. These are states of bank designated by BS signal.
4. Device state is 1, 2, 4, 8, and full page burst operation.
5. LDM and UDM can be enable respectively.
6
Rev. 1.4
May 2006
ETRON [ ETRON TECHNOLOGY, INC. ]
