EtronTech
EM68C08CWAE
Table 14. Precharge & Auto Precharge Clariification
Minimum Delay between “From
Command” to “To Command”
From Command
Read
To Command
Unit Note
tCK 1,2
tCK 1,2
Precharge (to same Bank as Read)
Precharge All
Precharge (to same Bank as Read w/AP)
Precharge All
Precharge (to same Bank as Write)
Precharge All
Precharge (to same Bank as Write w/AP)
Precharge All
AL+BL/2+max(RTP,2)-2
AL+BL/2+max(RTP,2)-2
AL+BL/2+max(RTP,2)-2
AL+BL/2+max(RTP,2)-2
Read w/AP
Write
WL+BL/2+tWR
WL+BL/2+tWR
WL+BL/2+tWR
WL+BL/2+tWR
tCK
tCK
tCK
tCK
2
2
2
2
Write w/AP
Precharge
Precharge All
Precharge (to same Bank as Precharge)
Precharge All
1
1
1
1
Precharge
Precharge All
NOTE 1: RTP [cycles] =RU {tRTP [ns]/tCK (avg) [ns]}, where RU stands for round up.
NOTE 2: For a given bank, the precharge period should be counted from the latest precharge command, either
one bank precharge or precharge all, issued to that bank.The prechrage period is satisfied after tRP or tRPall(=tRP
for 8 bank device + 1X tCK) depending on the latest precharge command issued to that bank.
z Refresh command
When CS#, RAS# and CAS# are held LOW and WE# HIGH at the rising edge of the clock, the chip enters the
Refresh mode (REF). All banks of the DDR2 SDRAM must be precharged and idle for a minimum of the Precharge
time (tRP) before the Refresh command (REF) can be applied. An address counter, internal to the device, supplies
the bank address during the refresh cycle. No control of the external address bus is required once this cycle has
started.
When the refresh cycle has completed, all banks of the DDR2 SDRAM will be in the precharged (idle) state. A
delay between the Refresh command (REF) and the next Activate command or subsequent Refresh command
must be greater than or equal to the Refresh cycle time (tRFC).To allow for improved efficiency in scheduling and
switching between tasks, some flexibility in the absolute refresh interval is provided. A maximum of eight Refresh
commands can be posted to any given DDR2 SDRAM, meaning that the maximum absolute interval between any
Refresh command and the next Refresh command is 9 * tREFI
.
Rev. 1.3
20
Oct. /2015
ETRON [ ETRON TECHNOLOGY, INC. ]
