Et r on Tech
EM669325
4M x 32 LPSDRAM
D.C. CHARACTERISTICS (Ta = -25~85°C)
- 75/8/1H/1L
Max.
Description/Test condition
Symbol
Unit
Operating Current
tRC ≥ tRC(min), Outputs Open, Input
signal one transition per one cycle
1 bank
operation
ICC1
150/145/140/130
Precharge Standby Current in power down mode
tCK = 15ns, CKE ≤ VIL(max)
Precharge Standby Current in power down mode
tCK = ∞, CKE ≤ VIL(max)
ICC2P
2
2
ICC2PS
Precharge Standby Current in non-power down mode
tCK = 15ns, CS# ≥ VIH(min), CKE ≥ VIH
Input signals are changed once during 30ns.
Precharge Standby Current in non-power down mode
tCK = ∞, CLK ≤ VIL(max), CKE ≥ VIH
Active Standby Current in power down mode
CKE ≤ VIL(max), tCK = 15ns
Active Standby Current in power down mode
CKE & CLK ≤ VIL(max), tCK = ∞
Active Standby Current in non-power down mode
CKE ≥ VIH(min), CS# ≥ VIH(min), tCK = 15ns
Active Standby Current in non-power down mode
CKE ≥ VIH(min), CLK ≤ VIL(max), tCK = ∞
Operating Current (Burst mode)
ICC2N
30
ICC2NS
ICC3P
ICC3PS
ICC3N
ICC3NS
ICC4
12
6
mA
6
60
50
220/210/180/170
250/240/220/210
800
tCK =tCK(min), Outputs Open, Multi-bank interleave
Refresh Current
tRC ≥ TrC(min)
Self Refresh Current
ICC5
ICC6
uA
CKE ≤ 0.2V
Preliminary
16
Rev 0.6
Sep. 2003
ETRON [ ETRON TECHNOLOGY, INC. ]
