Etr onTech
Mode Register Set (MRS)
4Mx16 DDR SDRAM
EM658160
The mode register is divided into various fields depending on functionality.
•
Burst Length Field (A2~A0)
This field specifies the data length of column access using the A2~A0 pins and selects the
Burst Length to be 2, 4, 8.
A2
0
0
0
0
1
1
1
1
•
A1
0
0
1
1
0
0
1
1
A0
0
1
0
1
0
1
0
1
Burst Length
Reserved
2
4
8
Reserved
Reserved
Reserved
Reserved
Addressing Mode Select Field (A3)
The Addressing Mode can be one of two modes, both Interleave Mode or Sequential Mode.
Both Sequential Mode and Interleave Mode support burst length of 2,4 and 8.
A3
0
1
Addressing Mode
Sequential
Interleave
--- Addressing Sequence of Sequential Mode
An internal column address is performed by increasing the address from the column
address which is input to the device. The internal column address is varied by the Burst
Length as shown in the following table.
Data n
Column Address
0
n
1
n+1
2
n+2
3
n+3
4
n+4
5
n+5
6
n+6
7
n+7
2 words
Burst Length
4 words
8 words
Full Page (Even starting address)
--- Addressing Sequence of Interleave Mode
A column access is started in the input column address and is performed by inverting the
address bits in the sequence shown in the following table.
Data n
Data 0
Data 1
Data 2
Data 3
Data 4
Data 5
Data 6
Data 7
A7
A7
A7
A7
A7
A7
A7
A7
A6
A6
A6
A6
A6
A6
A6
A6
A5
A5
A5
A5
A5
A5
A5
A5
Column Address
A4
A4
A4
A4
A4
A4
A4
A4
A3
A3
A3
A3
A3
A3
A3
A3
A2
A2
A2
A2
A1
A1
A0
A0#
4 words
8 words
Burst Length
A1# A0
A1# A0#
A0
A0#
A2# A1
A2# A1
A2# A1# A0
A2# A1# A0#
Etron Confidential
6
Rev. 1.1
Jan. 2002
ETRON [ ETRON TECHNOLOGY, INC. ]
