EM639325
EtronTech
Figure 39. Byte Read and Write Operation
(Burst Length=4, CAS# Latency=3)
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
CLK
CKE
High
CS#
RAS#
CAS#
WE#
BA0, 1
A10
RAx
A0-A9,
A11
RAx
CAx
CAy
CAz
DQM m
DQM n
DQ M
Ax0
Ax1
Ax1
Ax2
Ax2
DAy1 Day2
Az1
Az1
Az2
Az2
Ax3
DAy0 DAy1
DAy3
Az0
Az3
DQ N
Upper Byte
is masked
Read
Command
Bank A
Activate
Command
Bank A
Read
Command
Bank A
Upper Byte
is masked
Lower Byte
is masked
Write
Command
Bank A
Lower Byte
is masked
Lower Byte
is masked
Don’t Care
Note : M represent DQ in the byte m; N represent DQ in the byte n.
Rev. 2.1
41
Aug. /2015