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EM639165TS-75 参数 Datasheet PDF下载

EM639165TS-75图片预览
型号: EM639165TS-75
PDF下载: 下载PDF文件 查看货源
内容描述: 8Mega X 16位SDRAM [8Mega x 16bits SDRAM]
分类和应用: 动态存储器
文件页数/大小: 48 页 / 655 K
品牌: ETRON [ ETRON TECHNOLOGY, INC. ]
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EM639165  
PIN FUNCTION  
Master Clock:  
CLK  
CKE  
Input  
Input  
All other inputs are referenced to the rising edge of CLK  
Clock Enable:  
CKE controls internal clock.When CKE is low, internal clock for  
the following cycle is ceased. CKE is also used to select  
auto / self-refresh.  
After self-refresh mode is started, CKE becomes asynchronous input.  
Self-refresh is maintained as long as CKE is low.  
Chip Select:  
/CS  
Input  
Input  
When /CS is high, any command means No Operation.  
/RAS, /CAS, /WE  
Combination of /RAS, /CAS, /WE defines basic commands.  
A0-11 specify the Row / Column Address in conjunction with BA0,1.  
The Row Address is specified by A0-11.  
The Column Address is specified byA0-8.  
A0-11  
Input  
A10 is also used to indicate precharge option. When A10 is high at a  
read / write command, an auto precharge is performed. When A10 is  
high at a precharge command, all banks are precharged.  
Bank Address:  
BA0,1 specifies one of four banks to which a command is applied.  
BA0,1 must be set with ACT, PRE , READ , WRITE commands.  
BA0,1  
Input  
DQ0-15  
Data In and Data out are referenced to the rising edge of CLK.  
Input / Output  
Din Mask / Output Disable:  
When DQM(U/L) is high in burst write, Din for the current cycle is  
masked. When DQM(U/L) is high in burst read,  
Dout is disabled at the next but one cycle.  
Input  
DQMU/L  
VDD,VSS  
Power Supply Power Supply for the memory array and peripheral circuitry.  
VDDQ,VSSQ Power Supply  
VDDQ and VSSQ are supplied to the Output Buffers only.  
Preliminary  
Rev 1.0 Feb. 2001  
3