EtronTech
EM636327
Note:
1. Stress greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to
the device.
2. All voltages are referenced to VSS.
3. These parameters depend on the cycle rate and these values are measured by the cycle rate under the
minimum value of tCK and tRC. Input signals are changed one time during tCK.
4. These parameters depend on the output loading. Specified values are obtained with the output open.
5. Power-up sequence is described in Note 10.
6. A.C. Test Conditions
LVTTL Interface
Reference Level of Output Signals
Output Load
1.4V / 1.4V
Reference to the Under Output Load (B)
Input Signal Levels
2.4V / 0.4V
1ns
Transition Time (Rise and Fall) of Input Signals
Reference Level of Input Signals
1.4V
1.4V
3.3V
W
50
1.2kW
W
50
Z0=
Output
Output
30pF
30pF
870W
LVTTL D.C. Test Load (A)
LVTTL A.C. Test Load (B)
7. Transition times are measured between VIH and VIL. Transition(rise and fall) of input signals are in a fixed
slope (1 ns).
8. tHZ defines the time in which the outputs achieve the open circuit condition and are not at reference
levels.
9. These parameters account for the number of clock cycle and depend on the operating frequency of the
clock as follows:
the number of clock cycles = specified value of timing/Clock cycle time
(count fractions as a whole number)
10.If clock rising time is longer than 1 ns, ( tR / 2 -0.5) ns should be added to the parameter.
11.Assumed input rise and fall time tT ( tR & tF ) = 1 ns
If tR or tF is longer than 1 ns, transient time compensation should be considered, i.e.,
[ ( tR + tF ) / 2 -1] ns should be added to the parameter.
Preliminary
1998
December
22
ETRON [ ETRON TECHNOLOGY, INC. ]
