EtronTech
EM636327
This field specifies the number of clock cycles from the assertion of the Read command to
the first read data. The minimum whole value of CAS# Latency depends on the frequency
of CLK. The minimum whole value satisfying the following formula must be programmed
¡ Ø
into this field.
tCAC(min)
CAS# Latency X tCK
A6
0
A5
A4
0
CAS# Latency
Reserved
1 clock
0
0
1
1
X
0
1
0
0
2 clocks
0
1
3 clocks
1
X
Reserved
·
Test Mode field (A9~A7)
These two bits are used to enter the test mode and must be programmed to "00" in normal
operation.
A9
X
A8
0
A7
0
Test Mode
normal mode
X
0
1
Vendor Use Only
Vendor Use Only
X
1
X
·
Single Write Mode (BS)
This bit is used to select the write mode. When the BS bit is "0", the Burst-Read-Burst-
Write mode is selected. When the BS bit is "1", the Burst-Read-Single-Write mode is
selected.
BS
0
Single Write Mode
Burst-Read-Burst-Write
Burst-Read-Single-Write
1
12 Special Mode Register Set command
(RAS# = "L", CAS# = "L", WE# = "L", DSF = "H", BS, A0-A9 = Register Data)
The special mode register is used to load the Color and Mask registers, which are used in Block
Write and masked Write cycles. The control information being written to the Special Mode register
is applied to the address inputs and the data to be written to either the Color register or the Mask
register is applied to the DQs. When A6 is "HIGH" during a Special Mode Register Set cycle, the
Color register will be loaded with the data on the DQs. Similarly, when A5 is "HIGH" during a
Special Mode Register Set cycle, the Mask register will be loaded with the data on the DQs.
A6=A5=1 in the Special Mode Register Set cycle is illegal.
Functions
Leave Unchanged
Load Mask Register
Load Color Register
Illegal
BS
X
A9 ~ A7
A6
0
A5
0
A4 ~ A0
X
X
X
X
X
X
X
X
X
0
1
X
1
0
X
1
1
One clock cycle is required to complete the write in the Special Mode register. This command
can be issued during the active state. As in a write operation, this command accepts the data
needed through DQ pins. Therefore, it should be attended not to induce bus contention.
13 No-Operation command
(RAS# = "H", CAS# = "H", WE# = "H")
The No-Operation command is used to perform a NOP to the SGRAM which is selected (CS#
is Low). This prevents unwanted commands from being registered during idle or wait states.
Preliminary
1998
December
16