EtronTech
EM636165
1M x 16 SDRAM
Figure 23. Full Page Random Column Write
(Burst Length=Full Page, CAS# Latency=2)
T0 T 1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T 11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
CLK
tCK2
CKE
CS#
RAS#
CAS#
WE#
A11
RAx
RBx
RBw
A10
RAx
RBx CAx
CAz
CBx CAy
CBy
CBz
RBw
A0~A9
tRP
tWR
DQM
DQ
tRRD
tRCD
DBz2
DAx0 DBx0 DAy0 DAy1 DBy0 DBy1 DAz0 DAz1 DAz2 DBz0 DBz1
Activate
Command
Bank B
Write
Command
Bank B
Write
Command
Bank B
Write
Command
Bank A
Write
Command
Bank B
Precharge
Command Bank B
(Precharge Temination)
Activate
Command
Bank A
Write
Write
Activate
Command
Bank B
Command
Bank A
Command
Bank A
Write Data
is masked
Preliminary
70
Rev. 2.7 Mar. 2006
ETRON [ ETRON TECHNOLOGY, INC. ]
