EtronTech
Operation Mode
1M x 16 SDRAM
EM636165
Fully synchronous operations are performed to latch the commands at the positive edges of CLK.
Table 2 shows the truth table for the operation commands.
Table 2. Truth Table (Note (1), (2) )
Command
BankActivate
BankPrecharge
PrechargeAll
Write
Write and AutoPrecharge
Read
Read and Autoprecharge
Mode Register Set
No-Operation
Burst Stop
Device Deselect
AutoRefresh
SelfRefresh Entry
SelfRefresh Exit
State
Idle
(3)
Any
Any
Active
(3)
Active
(3)
Active
(3)
Active
(3)
Idle
Any
Active
(4)
Any
Idle
Idle
Idle
(SelfRefresh)
CKE
n-1
CKE
n
DQM
(6)
A11 A
10
A
0-9
CS# RAS# CAS# WE#
H
H
H
H
H
H
H
H
H
H
H
H
H
L
H
H
L
L
H
X
X
X
X
X
X
X
X
X
X
X
H
L
H
L
L
H
H
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
L
V
V
X
V
V
V
V
V
X
X
X
X
X
X
X
X
X
X
X
V
L
H
L
H
L
H
V
X
X
X
X
X
X
X
X
X
X
X
V
X
X
V
V
V
V
V
X
X
X
X
X
X
X
X
X
X
X
L
L
L
L
L
L
L
L
L
L
H
L
L
H
L
X
H
L
X
H
L
X
L
L
L
H
H
H
H
L
H
H
X
L
L
X
H
X
X
H
X
X
H
X
H
H
H
L
L
L
L
L
H
H
X
L
L
X
H
X
X
H
X
X
H
X
H
L
L
L
L
H
H
L
H
L
X
H
H
X
H
X
X
H
X
X
H
X
X
Clock Suspend Mode Entry
Power Down Mode Entry
Active
Any
(5)
Active
Any
(PowerDown)
Clock Suspend Mode Exit
Power Down Mode Exit
Data Write/Output Enable
Data Mask/Output Disable
Active
H
X
H
X
X
X
X
X
X
Active
Note:
1. V=Valid X=Don't Care L=Low level H=High level
2. CKE
n
signal is input level when commands are provided.
CKE
n-1
signal is input level one clock cycle before the commands are provided.
3. These are states of bank designated by BS signal.
4. Device state is 1, 2, 4, 8, and full page burst operation.
5. Power Down Mode can not enter in the burst operation.
When this command is asserted in the burst cycle, device state is clock suspend mode.
6. LDQM and UDQM
Preliminary
6
Rev. 2.7 Mar. 2006
ETRON [ ETRON TECHNOLOGY, INC. ]
