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EM636165-XXI 参数 Datasheet PDF下载

EM636165-XXI图片预览
型号: EM636165-XXI
PDF下载: 下载PDF文件 查看货源
内容描述: 1Mega ×16同步DRAM (SDRAM)的 [1Mega x 16 Synchronous DRAM (SDRAM)]
分类和应用: 动态存储器
文件页数/大小: 73 页 / 756 K
品牌: ETRON [ ETRON TECHNOLOGY, INC. ]
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EtronTech  
EM636165-XXI  
1M x 16 SDRAM  
The Read command that interrupts a write burst without auto precharge function should be  
issued one cycle after the clock edge in which the last data-in element is registered. In order to  
avoid data contention, input data must be removed from the DQs at least one clock cycle before the  
first read data appears on the outputs (refer to the following figure). Once the Read command is  
registered, the data inputs will be ignored and writes will not be executed.  
T0  
T1  
T2  
T3  
T4  
T5  
T6  
T7  
T8  
CLK  
NOP  
NOP  
NOP  
COMMAND  
NOP  
WRITE A  
READ B  
NOP  
NOP  
NOP  
CAS# latency=1  
DOUT B  
DOUT B  
DOUT B  
DOUT B  
DIN  
DIN  
A
0
2
3
0
1
t
, DQ's  
CK1  
CAS# latency=2  
, DQ's  
DOUT B  
DOUT B  
A
DOUT B  
DOUT B  
1
don't care  
don't care  
2
3
0
0
t
CK2  
CAS# latency=3  
, DQ's  
DOUT B  
DOUT B  
DOUT B  
DOUT B  
3
DIN  
A
don't care  
t
0
1
2
0
CK3  
Input data must be removed from the DQ's at least one clock  
cycle before the Read data appears on the outputs to avoid  
data contention.  
Input data for the write is masked.  
Write Interrupted by a Read  
(Burst Length = 4, CAS# Latency = 1, 2, 3)  
The BankPrecharge/PrechargeAll command that interrupts a write burst without the auto  
m
precharge function should be issued cycles after the clock edge in which the last data-in element  
m
is registered, where  
equals tWR/tCK rounded up to the next whole number. In addition, the  
LDQM/UDQM signals must be used to mask input data, starting with the clock edge following the  
last data-in element and ending with the clock edge on which the BankPrecharge/PrechargeAll  
command is entered (refer to the following figure).  
T0  
T1  
T2  
T3  
T4  
T5  
T6  
CLK  
DQM  
t
RP  
COMMAND  
WRITE  
Precharge  
BANK (S)  
NOP  
NOP  
Activate  
ROW  
NOP  
NOP  
BANK  
COL n  
ADDRESS  
DQ  
t
WR  
DIN  
n
DIN  
n + 1  
: don't care  
Note:  
The LDQM/UDQM can remain low in this example if the length of the write burst is 1 or 2.  
Write to Precharge  
Preliminary  
10  
Rev. 1.1 Apr. 2005  
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