EtronTech
Write Cycle3
(UB#, LB# Controlled)(See Note 4)
tW C
EM564166
Address
t AS
tW P
tW R
W E#
t CW
CE#
t BW
UB# , LB#
t BLZ
t W HZ
D O UT
t LZ
t DS
t DH
D IN
(See Note 5)
VALID DATA IN
Note:
1.
2.
3.
4.
5.
WE# remains HIGH for the read cycle.
If CE# goes LOW with or after WE# goes LOW, the outputs will remain at high impedance.
If CE# goes HIGH coincident with or before WE# goes HIGH, the outputs will remain at high impedance.
If OE# is HIGH during the write cycle, the outputs will remain at high impedance.
Because I/O signals may be in the output state at this time, input signals of reverse polarity must not be
applied.
Preliminary
9
Rev 1.0
May 2001
ETRON [ ETRON TECHNOLOGY, INC. ]
