ES7020 PRODUCT BRIEF
PINOUT (A14 TO N26)
The pinout diagram for the clock and JTAG interfaces, and for
part of the decoder video, encoder input, PLL, RISC, and
encoder SDRAM interfaces of the ES7020, appears in Figure 3.
14
15
16
17
18
PCLK
QSCN
The pound symbol (#) denotes an active-low signal. The rest of
the ES7020 device pinout appears in Figure 1, Figure 2 and
21
22
23
24
25
26
19
20
LA20
LWRHL#
LCS3#
LCS1#
HSYNC#
TMS
TMC1
AIMCLK
RSVD
AILRCK
VIFLD
VSS
A
LA21
LWRLL#
LCS2#
LCS0#
VSYNC#
TRST
TDO
TDI
TMC2
AIBD
AIBCK
VSS
VSS
B
AVSS_
PLL
AVSS_
PLL
VID_XO
AVDD_
PLL
AVDD_
PLL
TCK
PSTOP
RSVD
CS2
VBAT
VSS
VI
VI
VSYNC# HSYNC#
C
VSS
VID_XI
VDD1.5
AVSS_
PLL
AVSS_
PLL
VSS
OSC32
OUT
VDD3.3
OSC32
IN
VSS
RESET#
VIN0
VIN1
D
VIN2
VIN3
VIN4
VIN5
E
VDD3.3
VIN6
VIN7
VICLK
F
MDQM
MWE#
MCAS#
MRAS#
G
MCS#
MCKE
MEMCLK
MD0
H
VSS
MD1
MD2
MD3
J
14
VSS
15
VSS
16
VSS
MD4
MD5
MD6
MD7
K
L
VDD1.5
MD8
MD9
MD10
L
VSS
VSS
VSS
M
VDD1.5
MD11
MD12
MD13
M
VSS
VSS
VSS
N
MD14
MD15
MD16
MD17
N
Figure 3 ES7020 Device Pinout (A14 to N26)
4
SAM0617-031405
ESS Technology, Inc.
ESS [ ESS Technology,Inc ]
