ESMT
Mobile SDRAM
M52D16161A (2J)
512K x 16Bit x 2Banks
Mobile Synchronous DRAM
FEATURES
1.8V power supply
LVCMOS compatible with multiplexed address
Dual banks operation
MRS cycle with address key programs
-
CAS Latency (2 & 3 )
-
Burst Length (1, 2, 4, 8 & full page)
-
Burst Type (Sequential & Interleave)
EMRS cycle with address key programs.
All inputs are sampled at the positive going edge of the
system clock
Burst Read Single-bit Write operation
Special Function Support.
-
PASR (Partial Array Self Refresh )
-
TCSR (Temperature compensated Self Refresh)
-
DS (Driver Strength)
DQM for masking
Auto & self refresh
32ms refresh period (2K cycle)
GENERAL DESCRIPTION
The M52D16161A is 16,777,216 bits synchronous high data rate
Dynamic RAM organized as 2 x 524,288 words by 16 bits,
fabricated with high performance CMOS technology. Synchronous
design allows precise cycle control with the use of system clock I/O
transactions are possible on every clock cycle. Range of operating
frequencies, programmable burst length and programmable
latencies allow the same device to be useful for a variety of high
bandwidth, high performance memory system applications.
ORDERING INFORMATION
Product ID
M52D16161A-6TG2J
M52D16161A-7.5TG2J
M52D16161A-10TG2J
M52D16161A-6BG2J
M52D16161A-7.5BG2J
M52D16161A-10BG2J
Max Freq.
166MHz
133MHz
100MHz
166MHz
133MHz
100MHz
Package
50 Pin TSOP(II)
50 Pin TSOP(II)
50 Pin TSOP(II)
60 Ball VFBGA
60 Ball VFBGA
60 Ball VFBGA
Comments
Pb-free
Pb-free
Pb-free
Pb-free
Pb-free
Pb-free
PIN CONFIGURATION (TOP VIEW)
(TSOPII 50L, 400milX825mil Body, 0.8mm Pin Pitch)
BALL CONFIGURATION (TOP VIEW)
(BGA60, 6.4mmX10.1mmX1mm Body, 0.65mm Ball Pitch)
1
A
VSS
2
DQ15
3
4
5
6
DQ0
7
VDD
V
DD
DQ0
DQ1
V
SSQ
DQ2
DQ3
V
DDQ
DQ4
DQ5
V
SSQ
DQ6
DQ7
V
DDQ
LDQM
WE
CAS
RAS
CS
BA
A10/AP
A0
A1
A2
A3
V
DD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
V
SS
DQ15
DQ14
V
SSQ
DQ13
DQ12
V
DDQ
DQ11
DQ10
V
SSQ
DQ9
DQ8
V
DDQ
N.C/RFU
UDQM
CLK
CKE
N.C
A9
A8
A7
A6
A5
A4
V
SS
50PIN TSOP(II)
(400mil x 825mil)
(0.8 mm PIN PITCH)
N
A8
A7
A0
A10
M
BA
A9
NC
NC
L
CKE
NC
NC
CS
K
NC
CLK
RAS
CAS
J
NC
F
DQ9
VDDQ
VSSQ
DQ6
E
DQ10
VSSQ
VDDQ
DQ5
D
DQ12
DQ11
DQ4
DQ3
C
DQ13
VDDQ
VSSQ
DQ2
B
DQ14
VSSQ
VDDQ
DQ1
G
DQ8
NC
NC
DQ7
H
NC
NC
NC
NC
UDQM
LDQM
WE
P
A6
A5
A2
A1
60 Ball VFBGA
(6.4x10.1mm)
(0.65mm ball pitch)
R
VSS
A4
A3
VDD
Elite Semiconductor Memory Technology Inc.
Publication Date
:
Jun. 2010
Revision
:
1.5
1/32
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
