M32L1632512A
SUMMARY OF 2M Byte SGRAM BASIC FEATURES AND BENEFITS
Features
256K x 32 x 2 SGRAM
Benefits
Better interaction between memory and system without wait-state
of asynchronous DRAM.
Interface
Bank
Synchronous
High speed vertical and horizontal drawing.
High operation frequency allows performance gain for SCROLL,
FILL, and BitBLT.
Pseudo-infinite row length by on-chip interleaving operation.
Hidden row activation precharge.
2ea
Page Depth /1 Row
Total Page Depth
256 bit
High speed vertical and horizontal drawing.
High speed vertical and horizontal drawing.
2048 bytes
Programmable burst of 1, 2, 4, 8 and full page transfer per column
address.
Burst length (Read)
1, 2, 4, 8 Full Page
1, 2, 4, 8 Full Page
Programmable burst of 1, 2, 4, 8 and full page transfer per column
address.
Burst length (Write)
BRSW
Sequential & Interleave
2, 3
Switch to burst length of 1 at write without MRS.
Compatible with Intel and Motorola CPU based system.
Programmable CAS latency.
Burst Type
CAS Latency
High speed FILL, CLEAR, Text with color registers.
Maximum 32 byte data transfer (e.g. for 8bpp : 32 pixels) with
plane and byte masking functions.
Block Write
8 Column
Color Register
Mask Register
1ea.
1 ea.
A and B bank share.
Write-per-bit capability (bit plane masking). A and B bank share.
Byte masking (pixel masking for 8bpp system) for data-out/in
DQM0~3
Each bit of the mask register directly controls a corresponding bit
plane.
Mask function
Write per bit
Pixel Mask at Block Write Byte masking (pixel masking for 8bpp system) for color DQi.
BASIC FEATURE AND FUNCTION DESCRIPTION
1.CLOCK Suspend
1 ) C l o c k S u s p e n d e d D u r i n g W r i t e ( B L = 4 )
2 ) C l o c k S u s p e n d e d D u r i n g R e a d ( B L = 4 )
C L K
C MD
W R
R D
C K E
M a s k e d b y C K E
M a s k e d b y C K E
I n t e r n a l
C L K
D 3
D 3
D Q ( C L2 )
D Q ( C L 3 )
D 2
Q 2
Q 1
Q 3
Q 2
D 0
D 0
Q 0
Q 1
Q 0
D 1
D 1
D 2
Q 3
S u s p e n d e d D o u t
N o t W r i t t e n
*Note : CKE to CLK disable/enable=1 clock
Elite Semiconductor Memory Technology Inc.
Publication Date : Jun. 2001
Revision : 1.6 19/54
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
