ESMT
PSRAM
Features
• Wide voltage range: 1.7V–1.95V
• Access Time: 70 ns
• Ultra-low active power
— Typical active current: 3 mA @ f = 1 MHz
— Typical active current: 18 mA @ f = fmax
• Ultra low standby power
• Automatic power-down when deselected
• CMOS for optimum speed/power
‧Available
in 48-ball BGA package
• Operating Temperature: –40°C to +85°C
M24D16161DA
16-Mbit (1M x 16)
Pseudo Static RAM
CE2 LOW), outputs are disabled ( OE HIGH), both Byte High
Enable and Byte Low Enable are disabled (
BHE
,
BLE
HIGH), or during a write operation ( OE1 LOW and CE2
HIGH and
WE
LOW).
To write to the device, take Chip Enable ( CE1 LOW and
CE2HIGH) and Write Enable (
WE
) input LOW. If Byte Low
Enable(
BLE
) is LOW, then data from I/O pins (I/O
0
through
I/O
7
), is written into the location specified on the address pins
(A0through A
19
). If Byte High Enable (
BHE
) is LOW, then
data from I/O pins (I/O
8
through I/O
15
) is written into the
location specified on the address pins (A
0
through A
19
).
To read from the device, take Chip Enables ( CE1 LOW and
CE2 HIGH) and Output Enable ( OE ) LOW while forcing the
Write Enable (
WE
) HIGH. If Byte Low Enable (
BLE
) is LOW,
then data from the memory location specified by the address
pins will appear on I/O0 to I/O7. If Byte High Enable (
BHE
) is
LOW, then data from memory will appear on I/O
8
to
I/O
15
.Refer to the truth table for a complete description of read
and write modes.
Functional Description[1]
The M24D16161DA is a high-performance CMOS Pseudo
Static RAM organized as 1M words by 16 bits that supports
an asynchronous memory interface. This device features
advanced circuit design to provide ultra-low active current.
This is ideal portable applications such as cellular telephones.
The device can be put into standby mode when deselected
( CE1 HIGH or CE2 LOW or both
BHE
and
BLE
are
HIGH). The input/output pins (I/O
0
through I/O
15
) are placed in
a high-impedance state when : deselected ( CE1 HIGH or
Logic Block Diagram
Elite Semiconductor Memory Technology Inc.
Publication Date
:
Jul. 2007
Revision
:
1.0
2/12
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
