ESMT
M13S5121632A
DC Specifications
Version
Parameter
Symbol
Test Condition
Unit Note
-5
Operation Current
(One Bank Active)
tRC = tRC (min), tCK = tCK (min), Active – Precharge
IDD0
IDD1
180
210
mA
mA
Burst Length = 2, tRC = tRC (min), CL= 2.5,
IOUT = 0mA, Active-Read- Precharge
Operation Current
(One Bank Active)
Precharge Power-down
Standby Current
IDD2P
IDD2N
IDD3P
CKE ≤ VIL(max), tCK = tCK (min), All banks idle
10
55
45
mA
mA
mA
Idle Standby Current
CKE ≥ VIH(min), CS ≥ VIH(min), tCK = tCK (min)
All banks ACT, CKE ≤ VIL(max), tCK = tCK (min)
Active Power-down
Standby Current
One bank; Active-Precharge, tRC = tRAS(max),
tCK = tCK (min)
Active Standby Current
IDD3N
60
mA
Operation Current (Read) IDD4R
Burst Length = 2, CL= 2.5, tCK = tCK (min), IOUT = 0 mA
460
360
290
6
mA
mA
mA
mA
Operation Current (Write) IDD4W Burst Length = 2, CL= 2.5, tCK = tCK (min)
Auto Refresh Current
Self Refresh Current
IDD5
IDD6
tRC ≥ tRFC(min)
CKE ≤ 0.2V
1
Four bank interleaving with BL=4, tRC = tRC (min),
burst mode; Read with auto precharge;
Operation Current
IDD7
630
mA
(Four Bank Operation)
Address and control inputs on NOP edge are not
changing. IOUT = 0 mA
Note 1. Enable on-chip refresh and address counters.
AC Operation Conditions & Timing Specification
AC Operation Conditions
Parameter
Symbol
VIH(AC)
VIL(AC)
VID(AC)
Min
Max
Unit
V
Note
Input High (Logic 1) Voltage, DQ, DQS and DM signals
Input Low (Logic 0) Voltage, DQ, DQS and DM signals
VREF + 0.31
VREF - 0.31
VDDQ+0.6
V
0.7
V
1
2
Input Different Voltage, CLK and CLK inputs
VIX(AC)
0.5*VDDQ-0.2 0.5*VDDQ+0.2
V
Input Crossing Point Voltage, CLK and CLK inputs
Note 1. VID is the magnitude of the difference between the input level on CLK and the input on CLK .
2. The value of VIX is expected to equal 0.5*VDDQ of the transmitting device and must track variations in the DC level of the
same.
Input / Output Capacitance
(VDD = 2.5V~2.7V, VDDQ = 2.5V~2.7V, TA = 25°C , f = 1MHz)
Parameter
Symbol
CIN1
Min
2.0
Max
3.5
Unit
pF
Input capacitance
(A0~A11, BA0~BA1, CKE, CS , RAS , CAS , WE )
CIN2
2.0
3.5
pF
Input capacitance (CLK, CLK )
Data & DQS input/output capacitance
Input capacitance (DM)
COUT
CIN3
4.0
4.0
5.0
5.0
pF
pF
Elite Semiconductor Memory Technology Inc.
Publication Date : Oct. 2008
Revision : 1.0 5/47