ESMT
AC Timing Parameter & Specifications
(Note: 1~6, 9~10)
Parameter
CL2
Clock period
CL2.5
CL3
DQ output access time from CLK/ CLK
CLK high-level width
CLK low-level width
DQS output access time from CLK/ CLK
Clock to first rising edge of DQS delay
DQ and DM input setup time (to DQS)
DQ and DM input hold time (to DQS)
DQ and DM input pulse width (for each input)
Address and Control input setup time (fast)
Address and Control input hold time (fast)
Address and Control input setup time (slow)
Address and Control input hold time (slow)
Control and Address input pulse width (for
each input)
DQS input high pulse width
DQS input low pulse width
DQS falling edge to CLK setup time
DQS falling edge hold time from CLK
Data strobe edge to output data edge
Data-out high-impedance time from CLK/ CLK
Data-out low-impedance time from CLK/ CLK
Clock half period
DQ/DQS output hold time from DQS
Data hold skew factor
Active to Precharge command
Active to Active /Auto Refresh command period
Auto Refresh to Active / Auto Refresh
command period
Active to Read, Write delay
Precharge command period
Active to Read with Auto Precharge command
Active bank A to Active bank B command
Elite Semiconductor Memory Technology Inc.
t
AC
t
CH
t
CL
t
DQSCK
t
DQSS
t
DS
t
DH
t
DIPW
t
IS
t
IH
t
IS
t
IH
t
IPW
t
DQSH
t
DQSL
t
DSS
t
DSH
t
DQSQ
t
HZ
t
LZ
t
HP
t
QH
t
QHS
t
RAS
t
RC
t
RFC
t
RCD
t
RP
t
RAP
t
RRD
40
55
70
15
15
15
10
-0.7
t
CL
min or
t
CH
min
t
HP
- t
QHS
0.5
70K
t
CK
Symbol
-5
min
7.5
5
5
-0.7
0.45
0.45
-0.55
0.72
0.45
0.45
1.75
0.7
0.7
0.9
0.9
2.2
0.35
0.35
0.2
0.2
0.4
+0.7
+0.7
max
12
12
12
+0.7
0.55
0.55
+0.55
1.25
M13S2561616A (2K)
Operation Temperature Condition -40
°
C~85
°
C
-6
min
7.5
6
6
-0.7
0.45
0.45
-0.6
0.72
0.45
0.45
1.75
0.7
0.7
0.9
0.9
2.2
0.35
0.35
0.2
0.2
0.4
+0.7
-0.7
t
CL
min or
t
CH
min
t
HP
- t
QHS
0.5
42
60
72
18
18
18
12
70K
+0.7
max
12
12
12
+0.7
0.55
0.55
+0.6
1.25
Unit
Note
ns
ns
t
CK
t
CK
ns
t
CK
ns
ns
ns
ns
ns
ns
ns
ns
t
CK
t
CK
t
CK
t
CK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
22
11
11
20,21
21
18
15,17~19
15,17~19
16~19
16~19
18
Publication Date : May 2010
Revision : 1.2
9/49
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
