ESMT
AC Timing Parameter & Specifications-continued
Parameter
Half Clock Period
DQ-DQS output hold time
ACTIVE to PRECHARGE
command
Row Cycle Time
AUTO REFRESH Row Cycle
Time
ACTIVE to READ,WRITE
delay
PRECHARGE command
period
ACTIVE to READ with
AUTOPRECHARGE
command
ACTIVE bank A to ACTIVE
bank B command
Write recovery time
Write data in to READ
command delay
Col. Address to Col. Address
delay
Average periodic refresh
interval
Write preamble
Write postamble
DQS read preamble
DQS read postamble
Clock to DQS write preamble
setup time
Load Mode Register /
Extended Mode register
cycle time
Exit self refresh to READ
command
Exit self refresh to
non-READ command
Autoprecharge write
recovery+Precharge time
Symbol
-3.6
Min
t
CL
min
or
t
CH
min
M13S128324A
-4(CL3)
Min
t
CL
min
or
t
CH
min
-4
Min
t
CL
min
or
t
CH
min
-5
Max
-
-6
Max
-
Max
-
Max
-
Min
t
CL
min
or
t
CH
min
Min
t
CL
min
or
t
CH
min
Max
-
Unit
t
HP
t
QH
t
RAS
t
RC
t
RFC
t
RCD
t
RP
ns
ns
t
CK
t
CK
t
CK
t
CK
t
CK
t
HP
-0.
4
11
16
18
5
4
-
120K
ns
-
-
-
-
t
HP
-0.
45
10
15
17
5
4
-
120K
ns
-
-
-
-
t
HP
-0.
45
10
15
17
5
4
-
120K
ns
-
-
-
-
t
HP
-0.
45
8
12
14
4
4
-
120K
ns
-
-
-
-
t
HP
-0.
5
7
10
12
3
3
-
120K
ns
-
-
-
-
t
RAP
4
-
4
-
4
-
4
-
3
-
t
CK
t
RRD
t
WR
t
WTR
t
CCD
t
REFI
t
WPRE
t
WPST
t
RPRE
t
RPST
t
WPRES
3
15
2
1
-
0.25
0.4
0.9
0.4
0
-
-
-
-
7.8
-
0.6
1.1
0.6
-
3
15
2
1
-
0.25
0.4
0.9
0.4
0
-
-
-
-
7.8
-
0.6
1.1
0.6
-
3
15
2
1
-
0.25
0.4
0.9
0.4
0
-
-
-
-
7.8
-
0.6
1.1
0.6
-
2
15
2
1
-
0.25
0.4
0.9
0.4
0
-
-
-
-
7.8
-
0.6
1.1
0.6
-
2
15
2
1
-
0.25
0.4
0.9
0.4
0
-
-
-
-
7.8
-
0.6
1.1
0.6
-
t
CK
ns
t
CK
t
CK
us
t
CK
t
CK
t
CK
t
CK
ns
t
MRD
2
-
2
-
2
-
2
-
2
-
t
CK
t
XSRD
t
XSNR
200
75
(t
WR
/t
C
K
)
+(t
RP
/t
CK
)
-
-
200
75
(t
WR
/t
C
K
)
+(t
RP
/t
CK
)
-
-
200
75
(t
WR
/t
C
K
)
+(t
RP
/t
CK
)
-
-
200
75
(t
WR
/t
C
K
) +
(t
RP
/t
C
K
)
-
-
200
75
(t
WR
/t
C
K
)
+(t
RP
/t
CK
)
-
-
t
CK
ns
t
DAL
-
-
-
-
-
t
CK
Elite Semiconductor Memory Technology Inc.
Publication Date : May. 2007
Revision : 1.8
8/49
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
